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memtest86+-1.30.tar
- ddr and sdram memory check,ddr and sdram memory check-ddr sdram memory and check, ddr sdram memory check and
leon3-altera-ep2s60-ddr
- The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) development. The IP cores are centered around a common on-chip bus, and use a coherent method for simulation and synthesis. The library is vendor in
ddr_ctrlv
- ddr ram controller vhdl code
FPGADDR
- 基于FPGA的DDR接口驱动上电初始化的部分已经完成 主要的功能部分尚未编写
128Mb_ddr
- 128Mb DDR verilog源程序