SD card controller can just read data using 1 bit SD mode. I have written this core for NIOS2 CPU, Cyclone, but I think it can works with other FPGA or CPLD. Better case for this core is SD clock = 20 MHz and CPU clock = 100 MHz (or in the rati

用ATMEL AVR CPU开发CF CARD的程式.在BASCOM环境-with ATMEL AVR CPU CARD CF development programs. In BASCOM environment