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desigingCRCwithVDHL
- 用VHDL设计CRC发生器和校验器,供初学者参考。-CRC generator and calibration device for advanced users.
Examples_VHDL
- Examples of VHDL Descr iptions ROM-based waveform generator-Examples of VHDL Descr iptions ROM-based w aveform generator
Digital_system_design_example
- 数字系统设计实例.pdf,VHDL语言实现,7.1 半整数分频器的设计7.2 音乐发生器7.3 2FSK/2PSK信号产生器7.4 实用多功能电子表7.5 交通灯控制器 7.6 数字频率计.值得一看。-digital system design examples. Pdf, VHDL, 7.1-integer divider design Music Generator 7.2 7.3 2FSK/2PSK Signal Generator 7.4 Practical multi-functi
TCNTL
- 用ISE开发的VHDL随机地址发生器,采用循环计数生成地址-using VHDL development of the ISE random address generator, cycle counting generated addresses