初始化USB控制芯片，实现FIFO模式传输-Initialize the USB controller chip, the FIFO mode transfer

在上位机上实现cy68013的slavefifo模式传输代码-In PC mode to achieve cy68013 of slavefifo transmission code

application note focuses on the design of a synchronous FIFO master interface. A master initiates transfers, drives an address bus (if present), and usually supplies a clock to the slave. The slave device used in this design is another FX3 de

使用外部fifo，CY7C68013A USB芯片-readme.txt for FX2_to_extsyncFIFO GPIF FIFO Transactions Auto mode see GPIF Primer section on design examples for operating instructions and details