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MAXplusII102crack
- MAXplusII102crack--cpld fpga
crc校验的matlab程序
- crc校验的matlab程序，对多项式进行处理，可以正常运行，经过fpga实现验证-crc check of the matlab program, processing of the polynomial can be normal operation, after verification fpga implementation
80211b-simlink.rar
- 802.11b simulink simulation source code for PHY layer. It can be used to generate bit-true test vector for RTL level design(FPGA). ,802.11b simulink simulation source code for PHY layer. It can be used to generate bit-true test vector for RTL level d
actel_fpga_FIFO
- actel FPGA的fifo使用说明，你也可以在周立功官网上下载的到，比较实用！-actel FPGA fifo instructions, you can also download form the www.zlgmcu.com !
SCommTest
- 通过串口控制FPGA晶圆测试电路的软件，用于学生做相关实验-FPGA through the serial control circuit wafer testing software for students to do experiments
7
- 通讯编程类实现串口通讯很好实现了FPGA的串口通讯-Programming category of communication a good serial communication implementation of the FPGA implementation of serial communication
throughput_c_program
- 一个计算吞吐量的C程序，对FPGA实现很有用-a compution of throughput c_program
serialcomuniactionsource_files
- 用于FPGA与232通信的编程设计，用VERILOG语言编写的，在ISE中仿真-232 communications for FPGA programming and design, using the VERILOG language in ISE Simulation
SCommTest
- SCommTest，实现了两个串口之间的通信功能，可以调试，互发互收。-SCommTest.zipA serial interface is a simple way to connect an FPGA to a PC. This project shows how to create an asynchronous serial link like RS-232 in an FPGA.
AD7656
- AD7656芯片的FPGA接口程序，实现AD采样和数字信息转换-AD7656 chip FPGA interface program, the AD sampling and digital information into
communication-module
- 23 instances of communication module fpga implementation
exercise3
- 用verilog实现dsp与Fpga接口的同步设计，其功能包括读写操作及四个功能模块，采用两个fifo实现不同时钟域的地址与数据的转换，在quartus ii11.0环境下运行，运行此程序之前需运行将调用fifo。-Dsp using verilog achieve synchronization with Fpga interface design, its features include read and write operations and four functional modul
emif_tt
- 实现dsp与fpga的emif的verilog异步实现，可实现异步读写以及相应功能模块控制，文件中包含仿真后的波形图形以及仿真测试程序，运行环境quartus ii11.0，仿真环境mmodelsim se 6.5d-Achieve dsp and fpga verilog asynchronous implementation of the emif, enabling asynchronous reading and writing as well as the corresponding
C6474L_EVM_RTL
- TI C6474评估板的fpga源代码，初始化板子必备代码，Verilog HDL硬件语言编写。-TI C6474 evaluation board fpga source code, the code necessary to initialize the board, Verilog HDL hardware language.
cdanpianji
- 红色飓风四代 altera DDR2 FPGA 开发 -FPGA development DDR2
FPGA_16QAM
- 16qam调制系统是方案论证，每个模块的原理分析以及FPGA代码实现-16qam modulation system is a demonstration program, the principles of analysis and FPGA code for implementation of each module
wp_wimax
- WiMAX, or the IEEE 802.16 standard for broadband wireless access, is increasingly gaining in popularity as a technology with significant market potential. This paper first provides an overview of the existing and developing 802.16 standards and t
USB-VC1
- USB开发上位机程序,实现了用上位机控制FPGA开发板的灯。-Uucclv a u5E09 u3F0D u7F0D u7A0B u7A0B u5E8E u5B9E u7B0 u4E86 u7528 u4E0A u4F4D u673A u63A1 u5236FPGA u5F00 u53D1 u677F u7684 u706F u3002