搜索资源列表
Altera_uart_Verilog
- FPGA/CPLD应用,uart的Verilog HDL原码-FPGA / CPLD applications, UART Verilog HDL source
C6474L_EVM_RTL
- TI C6474评估板的fpga源代码,初始化板子必备代码,Verilog HDL硬件语言编写。-TI C6474 evaluation board fpga source code, the code necessary to initialize the board, Verilog HDL hardware language.