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actel_fpga_FIFO
- actel FPGA的fifo使用说明,你也可以在周立功官网上下载的到,比较实用!-actel FPGA fifo instructions, you can also download form the www.zlgmcu.com !
exercise3
- 用verilog实现dsp与Fpga接口的同步设计,其功能包括读写操作及四个功能模块,采用两个fifo实现不同时钟域的地址与数据的转换,在quartus ii11.0环境下运行,运行此程序之前需运行将调用fifo。-Dsp using verilog achieve synchronization with Fpga interface design, its features include read and write operations and four functional modul