搜索资源列表
USB1_CORE
- USB v1.1 RTL and design specification
6805
- USB v1.1 RTL and design specification
vhdl
- usb rtl code, to fpga or asic
55593379usb(FPGA)
- this a vhdl code for a bus-this is a vhdl code for a bus
slaveController
- 对USB的从机设备的IP核进行了重新设计并在一定程度上进行了优化-On the USB device from the IP core has been redesigned to some extent, is optimized
RTL
- 对usb设备控制的ip核进行了重新设计并进一步优化-Usb device on the control of nuclear ip has been redesigned and further optimize
pic16c765_HID_mouse
- USB HID mouse device firmware source code using PIC s MCU
usb_doc
- USB_DOC,详细描述了usb1.1协议-USB_DOC，it descibes usb
vhdlshili
- 多个vhdl 实例，USB UART I2C VGA-vhdl USB UART I2C VGA
USBfpgavhdl
- 基于USB的通信程序开发，附源码，在EDA平台上实现 -USB-based communications program development, with source code, in the EDA platform
2
- CCD信号采集系统的USB接口设计,CCD信号采集系统的USB接口设计-vhdl
6713_FPGA
- DSP+FPGA+USB2.0板子电路图 DSP是6713；FPGA是XilinxXC2S200；USB芯片是CY68013A-128AXC-DSP+ FPGA+ USB2.0 circuit board DSP is 6713 FPGA is XilinxXC2S200 USB chip is CY68013A-128AXC
T2_USB_IN
- 这是一段关于USB接口输入的VHDL源程序-S9_LED_RUN.rar
VHDL_NEXYS_Example41
- In this example w ill interface the PS/2 port to a PS/2 keyboard, also known as an AT keyboard. The example will not apply to the newer USB keyboards, or to the older, obsolete XT keyboard. Keyboards contain their own microprocessors that conti
USB_BLASTER_code
- 用于制作ALTERA FPGA的下载线（USB_BLASTER）的CPLD逻辑代码（VHDL代码）。-USB BLASTER CODE DDFP SDFA SDE DSF DOD DOE DOE DOIII DEG SDAF, FSGR SE.