搜索资源列表
my_fsm_vhdl
- How to infer a finite state machine for fpga altera xilinx
srl_test
- how to infer a shift register for fpga altera xilinx
j32
- mini soc fpga 16bit use realy small amount of gates xilinx
ise_book
- 关于xilinx的FPGA的EDK的程序（教程），使用ise集成环境-On the FPGA of the EDK program (tutorial), using ise integration environment
picieee.tar
- The Synthetic PIC is a synthesizable VHDL descr iption of the basic Microchip PIC 16C5X microcontroller. It is written in the ViewLogic VHDL environment (Workview PLUS 5.2). It has successfully been synthesized to the XC4000 family, although
couter
- 这是一个基于Xilinx Spartan3e开发板的非常简单的一个源代码，对于初学者可以用来熟悉Fpga的开发流程用。-This is a very simple code based on xinlinx Spartan3e board,it s very useful for beginner to study FPGA.
7_Series_XPE_14_1
- xilinx 7系列 FPGA功耗评估，excel格式，-xilinx 7 fpga xpe
calculator
- 基于赛灵思的spartan-3e开发板的语音智能计算器的设计，开发语言verilog，开发软件ISE，可以根据ucf文件理清引脚关系。应用者需要对开发板和fpga设计有一定的了解！-Development board based on Xilinx spartan-3e voice smart calculator design, development languages Verilog, developing software ISE, according to
src
- SRC IMPLIMENTATION ON VHDL USING XILINX AND FPGA GIVES HIGH SECURITY IN DATA TRANSMISSION
Greedy_snake
- 利用Xilinx ISE平台在FPGA实验板和VGA显示屏上完成简单的贪吃蛇游戏-Use Xilinx ISE platform to complete a simple Snake game on FPGA experimental board and VGA display
s6all
- spartan6 系列FPGA PIN文件 xilinx不提供现成的库 用于生成器件原理图库-spartan6 series FPGA PIN file xilinx does not provide ready-made libraries for generating devices Principle Gallery
DDS
- 附件包括1.基于FPGA实现DDS正弦波产生2.对应程设计说明一份3.重要说明一份。使用的软件平台为ISE13.3，硬件平台为Xilinx公司的V4板子。-DDS generator
2_01_adder4
- xilinx 代码，开发xinlinx FPGA的例程。对学习有帮助。-xilinx demo code
xilinx_dna_read
- 该模块已经成功运用在xilinx xc6slx45t，xc6slx75t多个产品中，经过实践证明，采用dna及其加密算法加密是一种成本低廉（无需另外加密芯片）可靠的加密手段。Xilinx Spartan-6 FPGA读取DNA数据并进行比较，产生比较结果信号输出。附带有xilinx DNA.ppt说明及调试注意事项。-The module has been successfully used in xilinx xc6slx45t, multiple xc6slx75t products, pr
LED
- FPGA中实现led流水灯,通过Verilog语言编程，程序中调用了xilinx公司提供的时钟分频IP CORE-This file is to achiece led like water
3-example_dt_2
- Vhdl编写的数码管驱动，动态7段码，FPGA实验板，Xilinx ISE实验环境-Vhdl write digital tube drive, dynamic 7-segment code, FPGA experimental board, Xilinx ISE experimental environment
module-song2
- xilinx VERILOG fpga BASYS2 音乐单次播放实现-xilinx VERILOG fpga BASYS2 music single player to achieve
kc724-schematic
- Xilinx Kintex-7，Xilinx Kintex-7 FPGA KC724 特性描述套件，硬件原理图-Xilinx Kintex-7
adc_dac
- ADC-DAC transmittion works thru SPI on 25 MHZ. Used for some student project on Xilinx sprtan3a FPGA
02Kintex修炼秘籍-MIG DDR应用3缓存设计
- vivado下的MIG教程,适用于XILINX 7系列FPGA(MIG tutorial under vivado.)