搜索资源列表
I2Cdesign.rar
- I2C总线Verilog源代码描述，ModelSim仿真,I2C bus Verilog source code descr iption, ModelSim Simulation
ahb_interface.rar
- AHB BUS, Master Slave Arbiter -- example,AHB BUS, Master Slave Arbiter
Jh_cpu
- Jh_cpu is a cpu with 12 address,8 data bus, adn give direct address ,indirect address two addressin way.-This VHDl code can provide a total clear and detail process to create a basic function risc cpu.
55593379usb(FPGA)
- this a vhdl code for a bus-this is a vhdl code for a bus
uc_interface
- This file provides an 8051 external data memory bus interface for CoolRunner CPLDs. This file contains the state machine to interface on the 8051 bus as well as the address registers, the address decode logic, and example control registers,
cpldbus51
- 51单片机与cpld总线连接vhdl源码-51 SCM and cpld bus connection vhdl source code
register
- 计算机组成原理实验通用寄存器组。仅供大家参考。-Computer Organization experimental general-purpose register group. Only for your reference.
PCI_introduction
- PCI局部总线的中文介绍，非常详细，对于不想阅读英文规范的同学们很有帮助。-PCI local bus in Chinese introduction, in great detail. And it is useful to who do not want to read English.
venomgen
- venomgen - C source code of VHDL code generator for CRC, BCH and RS encoder -venomgen- C source code of VHDL code generator for CRC, BCH and RS encoder * polynomials can be entered via command line * variable bus width * automatic testbench
LPCSPEC
- LPC总线规范，2002年8月1.1版，VHDL、固件编程必看-LPC bus specification, version 1.1 in August 2002, VHDL, firmware programming must see
I2Cvhdl
- 采用vhdl语言编写的串行总线I2c程序-The serial bus I2c procedures using VHDL language
can_latest.tar
- can总线的FPGA实现，代码为VHDL，逻辑清晰，代码规范-FPGA implementation can bus, code for VHDL, clear logic and code specifications
bus_sw
- vhdl code for bus switch
axi_master_latest.tar
- axi 总线 设计 和 仿真， 可以在设计中直接运动， 提供完整源代码和仿真文件， 用vhdl 语言实现。-axi bus design and simulation, you can directly exercise in design, providing full source code and simulation files, using vhdl language.
vspi
- SPI串口的内核实现verilog语言和VHDL语言-The serial peripheral interface spi bus