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PLL_grt_rtw.rar
- C语言实现了数字锁相环的程序，不过程序比较复杂，得参照MATLAB中 Discrete 3-phase pll模型,C language implementation of the DPLL procedure, but more complicated procedures, may refer to MATLAB, Discrete 3-phase pll model
PLL
- simulink 仿真锁相环的一个pdf-a pdf of pll using simulink
clock_system_of_LPC23xx
- LPC23xx系列ARM时钟源的选择、PLL的设置步骤以及注意事项等。PPT做的非常出色。-LPC23xx Series ARM clock source selection, PLL settings, as well as attention to matters such as these. PPT doing very well.
costas_loop
- 使用改进的COSTAS环实现锁相环（PLL），应用于高动态的数字化接收系统-COSTAS Central improved to achieve phase-locked loop (PLL), used in high dynamic digital reception system
pll_verilog_code
- 这是一段pll verilog代码，是本人转载！-This is a period of pll verilog code, yes I reprint!
pll
- 摘要:叙述了全数字锁相环的工作原理,提出了应用VHDL 技术设计全数字锁相环的方法,并用复杂可编程逻辑器件CPLD 予以实现,给出了系统主要模块的设计过程和仿真结果。-Abstract: This paper describes the working principle of an all-digital phase-locked loop is proposed application VHDL technical design an all-digital phase-locked loo
DPLL
- pll 的数字实现大家 支持 第一次 传-pll digital impliment
PLL_FM
- 锁相环的 systemview 实现，主要是还有FM的应用哦-PLL is implemented by system view, FM is an example.
PLL
- LM3236锁相环程序设计-LM3236 PLL program design
lmx2316
- pll lmx2316的驱动程序 pll lmx2316的驱动程序-the program of pll lmx2316
22222
- 新型软件锁相环的三相电压型PWM整流器的控制-The new software, three-phase PLL control voltage type PWM rectifier
PLL2007
- FM PLL transmitter, based on Sanyo LM7001 pll ic. using 89C2051 micom. complete with sourcode and PCB layout (in protel format).
PLL(lin)
- 一个用MATLAB 实现的锁相环路得程序-a program of phase loop link using the tool of simulink
pll
- 锁相环的常见问题解答，对于全面理解，和研究锁相环的各种指标，有非常好的指导作用-PLL FAQ for a comprehensive understanding of, and the various indicators of phase-locked loop, a very good guide
10.1.1.19.9992
- complete project design for pll and dds
8616039-PLL-Design-Part-2
- Phase-Locked Loops for High-Frequency Receivers and Transmitters–Part 2 by Mike Curtin and Paul O’Brien The first part of this series of articles introduced the basic concepts of phase-locked loops (PLLs). The PLL architecture and princip
CD4046 PLL Test
- CD4046 PLL Test circuits
DDSRF-PLL
- 本文论述了在控制的一个重要方面电网连接的电源转换器，即检测基波正序分量的电网电压不平衡和扭曲的条件下。明确地,提出了一种积极的基于一种新的序列检测器双同步坐标系的解耦锁相环（双dq–PLL），完全消除了检测误差传统的同步参考框架（SRF–锁相环PLL）。(This paper deals with an important aspect in the control of grid connected power converters, that is, detecting the fundam
pll
- this is pll for verilog
PLL
- pll的matlab仿真模型，完整，可以使用(Matlab simulation model of PLL,Complete,can be used)