C实现模拟与或非门的逻辑电路，可以多元件输入，支持元件延时，可以绘制输出波形-C simulation and implementation of logic circuits or door, you can enter many components to support the delay components, you can draw the output waveform

VC++组合逻辑仿真器源码附文档（毕业设计），感兴趣的可以参考下-VC++ source code combinational logic simulator with documentation (graduation project), interested can refer to

Demo client for logic simulator with api components