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zidongji
- 编译原理的实验，课后实验题，关于自动机的，可以判断是否为确定的又穷状态机-Compilation Principle of experiments, after-school test questions, on the automatic machine, you can determine whether another finite state machine to determine
FPGAFFT.rar
- FPGA控制串行AD（AD0804）,状态机实现，可以根据该程序实现数字电压计，数字温度计的设计,FPGA serial control AD (AD0804), state machine to achieve, you can program according to the number of voltage, the digital thermometer design
fft
- FPGA控制串行AD（AD0804）,状态机实现，可以根据该程序实现数字电压计，数字温度计的设计-FPGA serial control AD (AD0804), state machine to achieve, you can program according to the number of voltage, the digital thermometer design
Caluate
- 将中缀表达式转换为后缀表达式，并计算任意四则运算表达式的结果，采用链表和队列实现，非文法和状态机-Infix expression would be converted to suffix expressions, and calculate the arithmetic expression of arbitrary results, the use of linked lists and queues to achieve, non-grammar and the state machine
sdram_vhdl_lattice
- sdram接口的vhdl实现,适用于lattice的FPGA，内含状态机和各个模块的具体实现-SDRAM interface VHDL realization lattice applied to the FPGA, containing the state machine and the concrete realization of each module
state
- 十种状态机例子，简单易懂，是学习fpga的好帮手-Dozens of examples of state machine, easy to understand, is a good helper fpga study
DVDT_MORE
- 基于FPGA有限状态机的数据采集系统，实现对高速AD转换的控制。-FPGA-based finite state machine of the data acquisition system for high-speed AD conversion control.
ProducerConsumerExample
- 类似一个可乐销售机系统，LabVIEW网络讲坛《状态机》(State Machine)下集里面用作例子-Producer Consumer Example This particular example, a simulated soda machine, uses an event structure in the producer loop to register user input (depositingclicking on quarter, dime or nickel), an
Vending_machine
- A state machine implementation for a chocolate vending machine algorithm
machine
- 状态机的使用对于大家来是很关键，这是个有限状态机的使用的例子，方便大家学习。-The use of state machines is critical for us to, this is the use of finite state machine example so as to facilitate learning.
Determine-Warning-State-Machine
- 气象站 温度 风力 数据处理分析 判断警告 状态机-Weather warnings state machine to determine the temperature of wind
State-machine
- 状态机，北航c2的某一次作业题，经测试，能通过所有测试点-State machine, an operation of a Northern question c2, tested, pass all the test points
state-machine-program
- Verilog三段式状态机.pdf Verilog时序电路及状态机设计.ppt Verilog有限状态机设计.ppt 状态机.ppt 用状态机原理进行软件设计.pdf 有限状态机.pdf 有限状态机.ppt 状态机原理及用法.pdf 对状态机初学者有帮助。 -Verilog three-state machine the pdf Verilog Sequential Circuits and the state machine design. Ppt Veri
Buckland_Chapter2-State-Machines
- 这里一个有限状态机的例子，适合学习用，里面有三个程序，都是不同的程序，也有一个Common的文件，在VC++平如下运行时要导入这个文件，否刚系统编译找不到头文件而报-Here a finite state machine of example, suitable for learning to use, inside there are three procedures are different procedures, but also have a Common s file, VC++ l
Finite-State-Machine-
- Finite State Machine Datapath Design Optimization and Implementation
Simple-Finite-State-Machine
- This program can determin very accurately the nature of the user input, it detects whether it is an integer, a float, a number in scientific notation or simply an invalid input. To be capable of doing this the program uses a simple FSM (Fini
state-machine
- A verilog implementation of a state machine example.
_jki_lib_state_machine
- OpenG的JKI状态机，单线程字符串状态机，适合顺序结构的开发模式，简洁方便快速。(OpenG JKI state machine, single threaded string state machine, suitable for sequential structure development model, simple, convenient and fast.)
FSM
- material regarding finite state machine
state
- 简单的状态机，有8个状态,数码管输出当前状态的编号(A simple state machine, there are eight state, digital tube output the serial number of the current state)