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adder
- 这是一个用VHDL语言描述的8位带符号加法器,希望对大家有用-This is a descr iption using VHDL, 8-bit adder with a symbol, we want to be useful
Add_ahead
- 无流水线加法器与寄存器结合在一起的相位累加器设计程序-vhdl implementation of phase accumulator without pipelines
ImprovePipelineAdder
- 基于流水线加法器与寄存器结合在一起的相位累加器设计程序-vhdl implementation of phase accumulator with pipeline and registers.