可以实现DDC各个模块的功能，如内插、抽取、FIR滤波等功能

用matlab设计一个抽取率为2的CIC抽取滤波器和插值率为2的插值滤波器,Using matlab to design a decimation rate of 2 of the CIC decimation filter and interpolation rate of 2 of the interpolation filter

3级CIC抽取,内插滤波，r为抽取因子，n为原始信号的采样点数，x为原始信号序列 y为抽取滤波后的输出序列-3 CIC decimation, interpolation filter, r for the extraction factor, n the sampling points for the original signal, x is the original signal sequence y to extract the filtered output sequence

采用多相滤波结构进行仿真实验，先三倍抽取，后八倍内插(The simulation experiment is carried out using a polyphase filter structure, which is first extracted three times and interpolated eight times later)