多功能数字电路数字钟设计 课题设计资料，从大体上掌握设计思路-Multifunction digital clock digital circuit design information design issues, from design concept to grasp in general

设计一个年误差在毫秒级、免校对的数字钟，要求带有时分秒显示、掉电时时钟正常运行、免校对。 选做：增加报时功能，日报时点数最大100点，报时点掉电不丢失，并可冬夏季报时时间自动切换，各报时点报时时间可控。 -Design error in a millisecond years, free proof of the digital clock, minutes and seconds required with a display, power-down when the clock is

GPS数字钟计算机方面的程序与单片机实现串口通信-GPS digital clock computer-related procedures and MCU serial communication

数字钟VHDL软件设计，包含多种功能，报时，12,24切换，调时-The design of VHDL digital clock software, including a variety of functions, timer, 12,24 switch, adjustable