码数控振荡器相位累加器的位数N为32,利用verilog HDL语言在Quartus II 9.1中具体实现了载波和码NCO的设计。,The code numerically controlled oscillator phase accumulator bits N 32 verilog HDL language in the concrete realization of the design of the carrier and code NCO Quartus II 9.1.

GPS接收机设计中关于载波的产生、载波数控振荡器-carrier mixer、carrier nco

一种基于FPGA的数控振荡器技术的实现方法(FPGA implementation of NC oscillator NCO)