搜索资源列表
DDS+PLL
- 基于FPGA的新的DDS+PLL时钟发生器-FPGA-based new DDS PLL clock generator
DDFS_PLL_10DA_with51
- FPGA下的DDS程序的编写,VHDL语言,
uatr_and_dds
- 实现通过PC来控制fpga发出波形，波的形状和频率可通过PC控制，波形利用dds来发出，这是当时我做的电子测量的课程设计。-Fpga implementation given by PC to control the waveform, wave shape and frequency can be controlled through the PC, waveform using dds to send, this is when I do the electronic measurement
NCO
- 一种基于FPGA的数控振荡器技术的实现方法(FPGA implementation of NC oscillator NCO)
dds_AD9834+rw
- dds9834通信控制,配i和FPGA控制和pll可以得到频率的捷变(dds9834 communication control, with I and FPGA control and PLL can get frequency agility)
YDLJYLH
- FPGA下的DDS程序的编写,VHDL语言,()