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FPGAdatatransport
- 本文设计的FPGA模块需要对GPS、便携打印机和串口数据进行处理，将详细介绍如何设计FPGA和不同外设之间的数据传输。同时，在RTL编码中，编写使综合与布局布线效果更佳的代码。
FPGArs232.rar
- FPGA中实现rs232串口通信程序，上位机和FPGA互发数据,FPGA to achieve rs232 serial communication procedures, each host computer and FPGA-fat data
usb_VC
- usb数据采集-上位机程序vc完整工程（配合cypress的usb芯片使用）-usb data acquisition- complete PC vc program works (with the usb chip to use cypress)
dataacquisitionwithFPGA
- 用fpga+usb显现的4通道800K的数据采集方案。-Fpga+ usb with emerging 4-channel data acquisition program of 800K.
FPGA-RS232-verilog
- fpga上的串口驱动程序，包括接收主机来的数据（deserial）和发送由FPGA产生的数据(serial).该程序的调试需要借助串口调试助手-serial port driver on the fpga, including the receiving host to the data (deserial) and send the data generated by the FPGA (serial) to pc. The program needs the serial debug deb
Uartmodule
- 实现FPGA与PC机的串口通信功能，实现数据的收发。-FPGA with the realization of PC-serial communication functions to send and receive data.
Lab10_RS232_ise10migration
- 串口传输,通过XILINX FPGA使用串口进行数据的接收和发送-RS232
CY7c68013_fpga_write_sram
- FPGA自FX2 slavefifo中读取数据，写入至SRAM-FPGA since FX2 slavefifo read data, write to the SRAM
feng_rs0
- 基于FPGA的串口通信，PC给FPGA发送数据，FPGA收到数据并返回给PC-FPGA-based serial communications, PC to the FPGA to send data, FPGA Receive data and return to the PC
verilog_16QAM
- 使用verilog实现全数字16QAM调制器，载波频率1MHZ，数据比特流的速率为100Kbps,-the modulation of 16QAM based on FPGA
high_speed_data_recovery
- 1. 程序的功能是:高速串行数据的恢复. 2. 其基本原理是：利用过采样，检测串行数据的边沿跳变，然后根据边沿提取处在数据相位正中央相邻的抽样值，将串行数据恢复过来。 3. 此程序是verilog 语言编写，用于xilinx virtexE 系列的FPGA-1. Program functions are: high-speed serial data recovery. 2. The basic principle is: the use of over-sampling to det
HDLC_VHDL
- 用VHDL实现从以太网到并行数据以及从并行数据到以太网的HDLC成帧解帧.附详细代码说明,方便阅读.可方面移植到Altera及Xilinx等厂家芯片,是做基于FPGA的以太网设计的好资料-Achieved using VHDL and parallel data from the Ethernet to parallel data from the HDLC framing solution to Ethernet frames. Attached detailed code instructi
parall_ad_da
- 并行DA和AD转换，能够成功实现其功能。已在FPGA开发板上验证。实现较高的数据转换精度。-Parallel DA and AD conversion, to successfully achieve its function. FPGA development board has been verified. Achieve higher precision data conversion.
CIS
- 程序主要实现EZ-USB的控制功能，加上BORD-CONTROL两个程序实现FPGA控制CIS图像采集程序的数据保存，并传输到PC机上进行数据保存-Program mainly realizes the ez-usb CONTROL functions, plus BORD CONTROL- two program CONTROL of CIS image acquisition program FPGA, and the data transmission to PCS data storag
USB20D_TEST
- usb20D接收数据应用程序界面。用于接受fpga数据所用-usb20D application program for receives data
PPI3
- 该设计完成线阵CCD数据采集任务，包括以下四个方面的内容，USB芯片固件设计，FPGA的驱动程序设计，USB驱动程序部分，PC客户端程序。USB芯片采用的事CY7638013A.-Linear CCD data acquisition tasks of the design is completed, including the following four aspects, the driver of USB chip firmware design, FPGA design, part of
FPGA-Source-Code_Verilog
- 关于USB编程的fpga程序，包括数据IN、数据OUT，完整工程，可做参考-On the USB programming fpga procedures, including data IN, data OUT, complete project, do reference
uart程序_quartus_verilog
- 该程序实现uart串口收发数据，按照通信数据格式，代码编写规范，实现fpga中uart通信功能。(The program realizes the UART serial transceiver data, according to the communication data format, code specification, to achieve UART communication function in fpga.)
test_ad_in
- 通过信号源给AD9220传输数据，并通过uart串口在PC上显示输入的数据(he data is transmitted to the AD9220 through the signal source, and the input data is displayed on the PC through the UART serial port.)
fpga_slavefifo2b_verilog
- fpga控制USB接口数据收发，包含verilog 仿真代码和调试工程(fpga control usb3.0, modelsim simulation, verilog language)