搜索资源列表
USB2.0
- UTMI全称为 USB2.0 Transceiver Macrocell Interface,此协议是针对USB2.0的信号特点进行定义的,分为8位或16位数据接口。目的是为了减少开发商的工作量,缩短产品的设计周期,降低风险。此接口模块主要是处理物理底层的USB协议及信号,可与SIE整合设计成一专用ASIC芯片,也可独立作为PHY的收发器芯片,下以8位接口为例介绍PHY的工作原理及设计特点。 -UTMI called USB2.0 Transceiver Macrocell Interfac
uart16550
- uart16550 is a 16550 compatible (mostly) UART core. The bus interface is WISHBONE SoC bus Rev. B. Features all the standard options of the 16550 UART: FIFO based operation, interrupt requests and other. The datasheet can b
up_buhuo
- 这是一个VERILOG接收端捕获模块,扩频码32倍,可以检测到相关峰-This is a VERILOG receiver capture module ,the spreader is 32,it can test the correlation peak
ca_code_gen
- CA_Code_Generator.vhd用于生成GPS的32颗卫星的CA码程序,经过测试验证并消除了毛刺;CA_TEST_BENCH.vhd内带测试程序,直接可调用MODELSIM进行测试验证,留有用户接口,方便用户产生其他卫星的CA码。-CA_Code_Generator.vhd used to generate the 32 GPS satellites CA code program, tested and verified to eliminate the burr CA_TEST_
UART
- 内含有完整的UART代码,包括发送和接受,且有testbench,可以直接仿真调试-Contain complete UART code, including send and receive and there testbench, can directly Simulation debugging
uart
- 通用穿行通信控制器,可以直接使用,在quartsII下开发-GM through communications controller, can be directly used in developing quartsII
bpsk2
- 介绍qpsk解调的代码!初学者可以参考参考!比较简单.-Introduction QPSK demodulation code! Beginners can refer to reference! Relatively simple.
UART
- 使用方法: uart编程,拷贝到硬盘,用ISE打开工程文件即可-Usage: uart programming, copied to the hard drive, open the project file with ISE can
filter
- 时钟滤波器设计,可进行毛刺去除,有需要可依进行参考设计-Clock filter design can be carried out burr removed, there is a need-based reference design
pro104_uart
- uart的代码,经实际运行可以通信,是xilinx uart 代码的改进,网上的xilinx uart代码有很多bug,用此代码可以改进运行。-UART code, the actual operation can be communication, xilinx uart code are improved, xilinx uart code online has a lot of bug, the code can be improved with this operation.
2004-02-29_USB_Das_Control_System_dip
- USB的驱动程序 可以方便的使用 已经通过验证-USB driver can easily use has been validated
carrier_nco
- 通信电路中产生载波的电路,可应用于GPS中的捕获和跟踪环路。-Generated carrier communication circuit of the circuit, can be applied to GPS in the capture and tracking loop.
rng
- 通信系统中的噪声发生器,可用于CDMA信号源电路。-Communication system noise generator can be used for CDMA signal source circuit.
usb
- USBHostSlave is a USB 1.1 host and Device IP core. – Supports full speed (12Mbps) and low speed (1.5Mbps) operation. – USB Device has four endpoints, each with their own independent FIFO. – Supports the four types of USB data transfer control,
BCH(31_21_5)
- BCH码的编码和解码全部过程的源代码,可以自行改变参数-BCH codes of all the process of encoding and decoding of the source code, can change the parameters
USBblaster
- FPGA的USB应用电路,已经成功通过测试,可以量产。-Application of FPGA circuit of the USB has been successfully tested, can be mass production.
chuankoutongxin
- 串口通信的概念非常简单,串口按位(bit)发送和接收字节。尽管比按字节(byte)的并行通信慢,但是串口可以在使用一根线发送数据的同时用另一根线接收数据。它很简单并且能够实现远距离通信。比如IEEE488定义并行通行状态时,规定设备线总常不得超过20米,并且任意两个设备间的长度不得超过2米;而对于串口而言,长度可达1200米。典型地,串口用于ASCII码字符的传输。通信使用3根线完成:(1)地线,(2)发送,(3)接收。由于串口通信是异步的,端口能够在一根线上发送数据同时在另一根线上接收数据。其
VHDL
- 可用于FPGA的用VHDL语言写的关于串口通讯的源代码-FPGA can be used in the VHDL language used on the source code for serial communication
uart_controler_0622
- 自己设计的串口数据格式转换模块,转换格式为8位——32位,用户可自行修改。-Design their own serial data format conversion module, the conversion format for 8- 32 spaces, users can modify their own.
insert_zero
- 可以实现HDLC帧结构中的添零功能,使得信息部分不会和HDLC帧头部分混淆。-can insert zero to the hdlc frame,