搜索资源列表
-
0下载：
基于TI TRF7960的RFID读卡器主机端源代码，支持14443A和14443B。,RFID 14443 application source code for the Texas Instruments TRF7960 RFID reader.
-
-
2下载：
使用Verilog实现全数字的16QAM调制器，假设载波的频率为1MHz，数据比特率为100kbit/s.包括源代码和testbench-use verilog to realize 16qam,carrier frequency is 1MHz,data rate is 100kbit/s.including source code and testbench
-
-
0下载：
LDPC的Verilog程序源代码，包括仿真数据等。文件很大，请慢慢下载,LDPC of Verilog source code, including the simulation data. Large file, please download slowly
-
-
0下载：
turbo码_verilog_编码源文件,turbo code _verilog_ coding source files
-
-
0下载：
CIC梳状滤波器verilog源码，包括积分器，下抽级以及梳状滤波器三个部分。,CIC comb filter verilog source code, including the integrator, under the pump, as well as comb filter class is in three parts.
-
-
0下载：
采用用verilog语言编写的全数字锁相环的源代码。-Verilog language used by all-digital phase-locked loop' s source code.
-
-
2下载：
在ModelSim或其他支持Verilog语言编译的环境中仿真可得GPS的P码及与卫星数据码调制后的波形，其中一个为源程序，另一个为测试程序-ModelSim or other support in the language Verilog simulation environment to compile available GPS P-code and code of satellite data after the modulation waveform, one for the sour
-
-
1下载：
基于verilog语言的ＧＰＳ模拟源代码，代码为４颗星，包含噪声信号。-GPS-based Analog Verilog language source code, code for the four stars, including the noise signal.
-
-
0下载：
带有自适应功能的UART，是用VERILOG编写的源码，包括测试文件，与大家分享-Adaptive function with UART, are prepared using VERILOG source code, including test papers, to share with you
-
-
0下载：
verilog编写的ldpc编码的源代码 -ldpc prepared verilog source code
-
-
0下载：
USB 2.0 verilog源代码,内包含详细文档资料。-USB 2.0 verilog source code, which contains detailed documentation.
-
-
0下载：
serial port rs232 in verilog source code
-
-
0下载：
USB及PCI总线设计的一些源代码（经测试）-USB and PCI bus design some of the source code
-
-
0下载：
All Digital Phase-Locked Loop verilog source code
-
-
0下载：
用VHDL和Verilog语言编写的总线的源程序，从开源网站上下载下的，希望对大家有用-Using VHDL and Verilog source code written in the bus, from the open-source Web site to download the next, and hope for all of us
-
-
0下载：
Web Camera System Verilog source code
-
-
0下载：
该程序是基于UART的控制，有VHDL和verilog的源码，共有兴趣的朋友参考-The program is based on the UART' s control, there is VHDL and verilog source code, a total interest of a friend reference
-
-
0下载：
ofdm bluespec system verilog source code
-
-
2下载：
<基于Verilog HDL的通信系统设计>源码，包含ASK,FSK,PSK,QPSK,PPM等的调制解调-< Verilog HDL-based communication system design> source, including ASK, FSK, PSK, QPSK, PPM and other modem
-
-
2下载：
采用verilog语言基于查找表描述8b10b编码源代码(Using Verilog language to describe 8B10B encoding source code based on look-up table)
-
