Jitter is extremely important in systems using PLL-based clock drivers. The effects of jitter range from not having any effect on system operation to rendering the system completely non-functional. This application note provides the reader wi

300 MHz内部时钟频率 集成的12位输出DAC 超高速，3 ps RMS抖动比较器9854代码(300 MHz Internal Clock Rate Integrated 12-Bit Output DAC Ultrahigh-Speed, 3 ps RMS Jitter Comparator9854code)