FFT 的Verilog代码，精炼，详细 ，可以参考一下-FFT code Verilog

FFT8+FPGA+verilog.输入：butt8_real0—7、butt8_imag0—7为输入的8位数据的实部和虚部；输出：y0_real~y7_real、y0_imag~y7_imag为8点fft的输出 -FFT8 FPGA verilog.butt8_real0—7、butt8_imag0—7y0_real~y7_real、y0_imag~y7_imag

Radix 2 fft in matlab and verilog.