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uart
- 这个是UART的控制器，已经跑通过，分4个模块，波特率生成、发送、接收和fifo,可供初学者参考
uart16550
- uart16550 is a 16550 compatible (mostly) UART core. The bus interface is WISHBONE SoC bus Rev. B. Features all the standard options of the 16550 UART: FIFO based operation, interrupt requests and other. The datasheet can b
Uart(FIFOSend.TimeoutReceive)
- AVR mega16/mega32的UART FIFO发送.超时接收,广泛应用于工业控制.这是原创作品.-AVR mega16/mega32 send the UART FIFO. Overtime receiver is widely used in industrial control. This is the original works.
UART16550
- UART控制器，集成FIFO，寄存器，数据位宽8位-UART controller, with FIFO, register, databus 8bits
seriafifo
- LPC2124，串口FIFO，接收功能实验，触点不同，效果有区别，实验为证-LPC2124 UART FIFI example
16550u
- Dos下使用串口实现先进先出,支持COM1-COM4- 16550 is a shareware program designed to allow the unlocking of the internal fifo buffer present in the UART chip of the same name. The program will scan all four COM ports (COM1:- COM4
51_uart_fifo51
- 51_uart_fifo51 串口收发程序源代码 环形缓冲区实现-Serial transceivers to achieve ring buffer source code
uart
- 黑金FPGA开发板串口收发程序，其中加入FIFO模块作为输入输出缓冲-Black gold development board FPGA procedures, which joined the FIFO module as input and output buffer
uartfifo
- fifo模式下的uart串口verilog的源程序-fifo mode serial uart verilog source
UART
- UART文件 包括发送器 接收器 fifo 测试文件-UART file includes a receiver transmitter fifo test files
43411050
- 这个是UART的控制器,已经跑通过,分4个模块,波特率生成,发送,接收和fifo,可供初学者参考()