uart16550 is a 16550 compatible (mostly) UART core. The bus interface is WISHBONE SoC bus Rev. B. Features all the standard options of the 16550 UART: FIFO based operation, interrupt requests and other. The datasheet can b

异步fifo 源程序代码 欢迎大家学习 用VHDL语言编写-asy fifo

UART控制器，集成FIFO，寄存器，数据位宽8位-UART controller, with FIFO, register, databus 8bits