使用Verilog实现全数字的16QAM调制器，假设载波的频率为1MHz，数据比特率为100kbit/s.包括源代码和testbench-use verilog to realize 16qam,carrier frequency is 1MHz,data rate is 100kbit/s.including source code and testbench

DTMB GB20600-2006 中国地面数字电视标准 3780点IFFT verilog 源代码-DTMB GB20600-2006 terrestrial digital TV standard 3780-point IFFT verilog source code

In this case is a viterbi algorithm code for decoding the convolutional code, using verilog HDL language. This code provide the method of deconvolution of the convolutional code