搜索资源列表
usbvhdl
- usb 代码 用VHDL编写 方便初学者使用 学习 有什么不明白的 大家可以回复 互相交流-usb using VHDL code to facilitate the preparation of beginners to learn what we do not understand each other can return exchange
USB2.0
- UTMI全称为 USB2.0 Transceiver Macrocell Interface，此协议是针对USB2.0的信号特点进行定义的，分为8位或16位数据接口。目的是为了减少开发商的工作量，缩短产品的设计周期，降低风险。此接口模块主要是处理物理底层的USB协议及信号，可与SIE整合设计成一专用ASIC芯片，也可独立作为PHY的收发器芯片，下以8位接口为例介绍PHY的工作原理及设计特点。 -UTMI called USB2.0 Transceiver Macrocell Interfac
2004-02-29_USB_Das_Control_System_dip
- USB的驱动程序 可以方便的使用 已经通过验证-USB driver can easily use has been validated
usb
- USBHostSlave is a USB 1.1 host and Device IP core. – Supports full speed (12Mbps) and low speed (1.5Mbps) operation. – USB Device has four endpoints, each with their own independent FIFO. – Supports the four types of USB data transfer control,
USBblaster
- FPGA的USB应用电路，已经成功通过测试，可以量产。-Application of FPGA circuit of the USB has been successfully tested, can be mass production.
vertibi
- (2,1,7)viterbi convolutional code encoding, decoding, debugging through, you can directly use