在ModelSim或其他支持Verilog语言编译的环境中仿真可得GPS的P码及与卫星数据码调制后的波形，其中一个为源程序，另一个为测试程序-ModelSim or other support in the language Verilog simulation environment to compile available GPS P-code and code of satellite data after the modulation waveform, one for the sour

GPS中C/A码产生简单的Verilog逻辑产生-GPS in the C/A code generated simple logic generated Verilog

基于verilog语言的ＧＰＳ模拟源代码，代码为４颗星，包含噪声信号。-GPS-based Analog Verilog language source code, code for the four stars, including the noise signal.

码数控振荡器相位累加器的位数N为32,利用verilog HDL语言在Quartus II 9.1中具体实现了载波和码NCO的设计。,The code numerically controlled oscillator phase accumulator bits N 32 verilog HDL language in the concrete realization of the design of the carrier and code NCO Quartus II 9.1.