搜索资源列表
GSM_DDC
- GSM中数字下变频器的matlab辅助设计，并可以采用matlab生成verilog代码。-GSM digital down converter in the matlab-aided design, and can be used matlab generate verilog code.
dhpi
- 接口设计，描述硬件与fpga的接口程序，使用verilog语言-Interface design, describe the hardware and fpga interface program, use the verilog language
BPSK_receiver
- BPSK接收机设计，能够通过Synplify DSP直接生成Verilog代码。-BPSK Reciver model. This simulink model can generate RTL code via Synplify DSP.