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myrake
- 涉及信号的编码和解码,调制和解调,信道的交织和解交织等。-involved in the signal encoding and decoding, modulation and demodulation, the intertwining of the Channel reconciliation so intertwined.
bit_intealeaver1
- verilog HDL语言实现dvb_t中的比特交织器源代码描述-verilog HDL language dvb_t the bit interleaver source code Descr iption
interleaver_3GPP_revised
- 3GPP标准交织器,还没有通过验证,请谨慎使用。谢谢各位支持。
pro_4d1
- 此代码可实现8bits 108M 4路BT656 像素交织输入转为8bits 108M 4路行交织的视频数据,并有仿真文件,在modelsim中运行即可。-This code can be realized 8bits 108M 4 way BT656 pixel interleaving input into 8bits 108M 4 way line of cutting the video data, and there are simulation files can be run in