搜索资源列表
vga
- 基于FPGA的VGA时序产生/控制器，产生行、场同步时序，并以标准格式输出,并有相应测试代码。开发工具ISE 8.1及以上。-FPGA-based VGA timing generator/controller, resulting in horizontal and vertical sync timing, and a standard format output, and the corresponding test code. Development tool ISE 8.1 and a
hardh264
- 一个硬件H264编码的VHDL源码，用于FPGA开发，适合IP摄像头等视频设备输出数据的编码。用Xilinx工具测试过，但代码不只是用于Xilinx。-A hardware h264 video encoder written in VHDL suited to IP cameras and megapixel cameras. Designed to be synthesized into an FPGA. Initial testing is using Xilinx tools
DE2_70_i2sound
- 非常好的源代码文件 已经在fpga开发板上验证-Very good source code files in fpga development board to verify
nios-vedio
- nios2视频教程，开发FPGA软核的资料-Nios2 video tutorial, the development of FPGA soft core data
MT9J003_10M_CMOS_V0.3_SEP13
- MT9J003的设计原理图,基于FPGA驱动,可供开发参考-MT9J003design shcedle ,based on the FPGA driver
zx3016_clock
- 24/12小时计时器，能够转换24/12小时制，能够显示星期、年月日、以及阴历等，能够在fpga开发板上运行-24/12 hour timer, 24/12 hour format can be converted, it will show the week, the date, and the lunar calendar, etc., can run in the fpga development board