搜索资源列表
VBuffer_1c6
- 视频采集并锁存到SDRAM中的完整代码，运行环境为QII，VHDL与标准参数宏模块调用混合设计 是学习视频采集的很好的参考-Video Capture SDRAM and latches to the integrity code, the operating environment for QII. VHDL standard parameter-called hybrid module is designed to study the Video Capture good reference
mp3decoder.rar
- mp3 解码的verilog代码，通过仿真综合及验证，能够播放所有的.mp3文件。压缩包包括所有的verilog源码以及详细的文档。,mp3 decoding Verilog code, the adoption of an integrated simulation and verification, can all play. mp3 file. Compressed packet including all the Verilog source code and detailed docu
H.264
- 关于h.264视频解码器完全源码（verilog）-With regard to h.264 video decoder full source code (verilog)
pro_4d1
- 此代码可实现8bits 108M 4路BT656 像素交织输入转为8bits 108M 4路行交织的视频数据，并有仿真文件，在modelsim中运行即可。-This code can be realized 8bits 108M 4 way BT656 pixel interleaving input into 8bits 108M 4 way line of cutting the video data, and there are simulation files can be run in
jpeg.tar
- jpeg硬件压缩代码，对学习jpeg压缩的同学非常有用-hardware jpeg compression code, the Student Study jpeg compression is very useful
simple_fm_receiver.tar
- 一个简单FM接收机的VHDL源码，很有参考意义-A simple FM receiver VHDL source code is very useful
rs_encode
- 这是用verilog编写的RS（204，188）代码，适用于数字电视的BCH编码过程。-This is the verilog prepared using RS (204,188) code, the application of digital television in the course of the BCH code.
MUSIC
- 频率音乐发生器硬件描述语言VHDL设计程序代码-the vhdl code for muisc player
sram_saa1117verilog
- 图像采集、存储控制verilog源代码，fpga控制SAA1117,采集数据存储到sram，仿真编译测试都能通过-Image acquisition, storage, control verilog source code, fpga control SAA1117, collecting data to sram, simulation tests can be compiled by
mpeg2_idct_hw
- 2-D的DCT/IDCT在軟硬體上的verilog code-dct/idct source code for soc
CD1_OV5620_SAVE_UDP_TRANS
- OV5620 VHDL CODE, Alter FPGA Source Code.
VD1
- VHDL code of full adder
csa_16
- The folder contains the carry adder code in vhdl. 16 bit adder is designed and coded in vhdl-The folder contains the carry adder code in vhdl. 16 bit adder is designed and coded in vhdl
sp6-ov7670
- 包含了用Spartan6控制OV7670的VHDL源程序，以及PC上的测试程序。对于学习EZUSB的朋友很有帮助。-OV7670 includes the use Spartan6 control of VHDL source code, and test program on the PC. EZUSB for learning helpful friends.