一个硬件H264编码的VHDL源码，用于FPGA开发，适合IP摄像头等视频设备输出数据的编码。用Xilinx工具测试过，但代码不只是用于Xilinx。-A hardware h264 video encoder written in VHDL suited to IP cameras and megapixel cameras. Designed to be synthesized into an FPGA. Initial testing is using Xilinx tools

采用13折线A率的PCM编码,逐次反馈型编码器。-A broken line 13 the rate of use of PCM encoding, successive feedback encoder.

用vhdl语言编写的h.265编码器，可用于xilinx或altera的fpga(h.265 encoder written by vhdl. It can be download to xilinx or altera's fpga)