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离散余弦变换在16位定点DSP上实现
- 载dsp上实现16dct和8dct的程序-contained dsp achieve 16dct procedures and 8dct
cosinexp
- 基于DSP的产生余弦信号的用C编写的程序，可通过CCS平台下载到DSK板上实现信号输出。-DSP-based cosine signals generated C preparation procedures, CCS platform can be downloaded to DSK board signal output.
16位定点DSP上实现离散余弦变换
- 平台：ADSP21xx 编程语言：ASM 说明：ADSP21xx-离散余弦变换在16位定点DSP上实现-platforms : ADSP21xx Programming Language : ASM : ADSP21xx - Discrete Cosine Transform in 16-bit fixed point DSP Implementation
cosinexp123
- 1.分别利用计算法和查表法产生1000Hz的余弦波信号，并使用示波器观测产生信号的频率和幅度。 2.利用计算法产生其他非正弦类周期信号波形，如周期矩形波、三角波、锯齿波等。-1. Each calculation method and the use of look-up table method have 1000Hz the cosine wave signal, Oscilloscope observation and the use of the generated signal f
ad_DCT
- verilog 编程 有测试文档 基于查表结构实现 离散余弦变换dct 来源：opencores -Verilog Programming is based on the test documents Lookup structure for a discrete cosine transform Extra Source : opencores
cordic.rar
- 基于cordic算法的正余弦信号发生器，通过编译仿真,Cordic algorithm is based on the cosine signal generator, through the compiled simulation
cos
- FPGA实现正弦，余弦的计算，verilog语言-FPGA realization of sine, cosine calculation, verilog language
arccos
- 一个求反余弦的cordic算法，整个工程。包括仿真。可以直接打开。-An inverse cosine of the cordic seeking algorithms, the whole project. Including the simulation. Can be directly opened.
coswave
- 主要是通过Altera公司的Cuclone系列的FPGA-EP1C3T144C8产生余弦波的源代码 基于LPM-ROM余弦波一周期含有256个10位数据；-Mainly through Altera s Cuclone series of FPGA-EP1C3T144C8 cosine wave generated source code based on the LPM-ROM cosine wave of one cycle containing 256 10-bit data
dct-code
- 离散余弦变换的VHDL实现，不错的代码和方法-Discrete cosine transform VHDL realization of good code and methods
cossin
- 数字信号源，输出不同频率，相位的正余弦信号，-Digital signal source, the output of different frequency, phase is the cosine signal,
at89c52t0
- 使用单片机，正弦波发生器，key0口按键减小输出频率，key1口按键增加输出频率 sinout口输出正弦波，（cosout口输出余弦波），使用定时器T0，16位定时模式。 R6、R7用作10毫秒延时寄存器。Fout输出方波。且输出的正弦波在0.01-83Hz范围内，方波在1.3Hz-10.6kHz范围内。-The use of single-chip, sine wave generator, key0 I reduce the output frequency keys, key1
C
- ADI中平方根升余弦滤波器的DSP实现 2中方法-ADI in the square root raised cosine filter of the DSP method to achieve 2
fpgafsk
- 至于FSK调制原理就不多说了，这里做的一个实验是二进制频移键控。发送一组码元，通过响应的键控电路监测是发1还是发0然后选择频率控制正余弦电路波形。-see
DDS
- 本代码可以用于产生正余弦信号波形，利用FPGA内部的ROM放置一个正余弦采样点的数据表格，通过循环取址的方法，实现波形连续输出。-This code can be used to generate positive cosine signal waveforms, using FPGA' s internal ROM to place a sampling point is the cosine of the data tables, the circulation method of t
implementation-of-srrc-filter
- 这是基于国标DMB_TH中发端升余弦滚降滤波器中FPGA实现，包括滤波器的理论，DA算法和多相分布算法-This is based on GB DMB_TH the originator Raised Cosine Filter in FPGA, including the filter theory, DA algorithm and multi-phase distribution algorithm
基于FPGA的反余弦算法代码
- 通过crodic算法迭代通过对常数C的设定旋转迭代x的分量使它等于常数C从而求出输入值c的反余弦arccosc的角度值
cordic02
- 利用CORDIC旋转因子的办法实现FPGA的各种必须函数，这里只要实现正余弦函数(The use of CORDIC rotation factor method to achieve the various functions of FPGA, here as long as the realization of sine and cosine function)
sincos
- 实现正余弦函数Verilog语言的生成...............(sine wave generator by using verilog)
SinCosTable
- 为了解决STM32等编写 fft任意点计算的查表计算问题，可以实现任意点的10位精度的正余弦表。(for STM32 and other MCU, for FFT calculatings.)