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foio
- verilog语言写的先进先出（FIFO）电路-verilog language written in FIFO (FIFO) circuit
fifo
- 异步FIFO是一种先进先出的电路，使用在需要产时数据接口的部分，用来存储、缓冲在两个异步时钟之间的数据传输。- Asynchronous FIFO is the electric circuit which one kind advanced leaves first, uses when needs to produce data interface s part, uses for to save, the cushion between two asynchronous clock s d
FIFO
- FIFO先进先出控制，调Quartus内核-FIFO IPcore
Example-b3-1
- 复杂的可编程逻辑器件硬件编程语言实例先进先出范例-The stuy of VHDL language
Example-b4-1
- 复杂的可编程逻辑器件硬件编程语言实例上传先进先出范例通过动手实践，熟悉Altera基本宏功能的产生和实现方法。-The example of cpld
fifo
- 模拟页式虚拟存储管理中硬件的地址转换和用先进先出调度算法处理缺页中断.虽然是文档文件，其源代码可以直接拷贝至C++运行，并且文档最后给出相应执行结果。-Simulation of the hardware address translation page of virtual storage management and FIFO scheduling algorithm for processing a page fault, although it is a document file an
cunchuguanli
- 模拟请求页式存储管理中硬件的地址转换和缺页中断，并用先进先出调度算法（FIFO）处理缺页中断；-Simulation request page storage management hardware address translation and page fault interrupt and FIFO scheduling algorithms (FIFO) processing a page fault
FIFO
- FIFO是英文First In First Out 的缩写，是一种先进先出的数据缓存器，他与普通存 储器的区别是没有外部读写地址线，这样使用起来非常简单，但缺点就是只能顺序写 入数据，顺序的读出数据，其数据地址由内部读写指针自动加1完成，不能像普通存 储器那样可以由地址线决定读取或写入某个指定的地址-FIFO is the abbreviation of the English First In First Out, a FIFO data buffer, the differen
FIFO
- 基于vhdl语言的fifo设计，方便你了解先进先出理论-Based on the the vhdl language of fifo design, allowing you to understand the first-in, first-out theory
fifo
- 先进先出存储器的接口设计，采用VHDL语言-FIFO memory interface design, using VHDL language
fifo_syn
- 实现了同步FIFO的功能，能完成数据的先进先出，当FIFO满或者空的时候能报出满或者空的信号。-Synchronous FIFO: it can complete data FIFO, when the FIFO full or empty time can you quote us full or empty signal.
FX2-Slave-FIFO
- usb芯片CY7C68013A例程,接口类型被动先进先出-passive first-in, first-out the usb chip CY7C68013A routine, interface type FIFO
myfifo
- 在quartus II上用宏功能模块编写的fifo先进先出寄存器功能-The fifo first-in, first-out register functions megafunctions written quartus II
asynchronous-FIFO-verilog
- FIFO是英文First In First Out 的缩写，是一种先进先出的数据缓存器，他与普通存储器的区别是没有外部读写地址线，这样使用起来非常简单-FIFO is an abbreviation of the English First In First Out, is a first-in, first-out data buffer, the difference between him and ordinary memory is external read and write add
FIFO-V1.1
- FIFO 先进先出C代码，包含FIFO.c,FIFO.h文件简单易懂好用。-FIFO FIFO C code, including FIFO.c, FIFO.h file straightforward to use.
keil_fifo_source-file
- 0V7670带FIFO模块，是针对慢速的MCU能够实现图像采集控制推出的带有缓冲存储空间的一种模块。这种模块增加了一个FIFO先进先出存储芯片。-0V7670 with FIFO module is for slow MCU control image acquisition can be achieved with the launch of a module buffer storage space. This module adds a FIFO FIFO memory chip.
FIFO-ring-buffer
- 用ICCAVR写的 ATmega640的串口的驱动，使用了先进先出的环形缓冲区技术 这是一个使用例子 稍微改动一下即可用到自己的项目中-ATmega640 with ICCAVR write serial driver, using FIFO ring buffer technology which is a slight change to the use of examples used in your own projects
vhd4
- 用VHDL语言实现了FIFO_RAM，及先进先出储存器的实现。-Just like
fifo_csm
- 一个先进先出的描述代码，用于实现先入先出的操作-first in first out
fifo2
- 异步fifo 先进先出 用于缓冲数据，用verilog HDL所写，在quartus II中测试通过，modelsim仿真-Asynchronous fifo FIFO for buffering data, using verilog HDL written in quartus II test through, modelsim simulation