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test2
- 共阴极七段显示译码电路,EDA用文本输入法设计1位异步清零同步时钟使能的十进制计数器-Seven of the cathode here shows decode circuitEDA use text input method design a asynchronous reset synchronous clock that can counter the decimal
EDAshuzimiaobiao
- EDA数字秒表 一、总体设计要求: 设计一个数字秒表,共有6位输出显示,分别为百分之一秒、十分之一秒、秒、十秒、分、十分;秒表的最大计数容量为60分钟,当计时达60分钟后,蜂鸣器报警;秒表还需有一个启动信号和一个归零信号,以便秒表能随意启停及归零。 二、技术要点: 1.秒表的逻辑结构主要由显示译码器、分频器、十进制计数器、六进制计数器和报警器组成。 2.最关键的是精确的100Hz计时脉冲如何获得,可由高频时钟信号经分频得到; 3.设计时钟扫描模块seltime和显示译码器
AD2
- MSP430F149 AD转换C程序:单通道采集,16次求平均,并转换为十进制数据,通过串口传至PC机显示- MSP430F149 AD converter C program: 16 times average single-channel acquisition, and converted to decimal data transmitted via the serial port to a PC display
two_ten
- 完成二进制到十进制的转换,使用例化语句,包括二选一模块、比较模块、七段数码管显示译码模块。-Complete binary to decimal conversion, the use cases of the statement, including the two selected a module, modules, seven-segment display decoder module.
1
- 定时、计数、显示 设计一系统,系统要求: 1、有一发光二极管闪烁,闪烁周期为2S,有一按键S1对其进行控制(按一次开,再按一次停) 2、对一脉冲源进行计数,所记录的脉冲个数以十进制形式在数码管显示(最大225),有一按键S2对其进行控制(按一次开,再按一次停)。 S1不开是,发光二极管灭;S2不开时数码管显示自己的学号。 -Timing, counting, display System design, system requirements: 1, a light-
Ad2Uart
- ADtoUart用C语言将8组AD转换的值分别用十六进制及十进制通过串口显示在电脑上面-ADtoUart eight groups of AD conversion in C language values 愠爀攀 hexadecimal and decimal displayed through the serial port on the computer above
four-decimal-frequency--meter
- 基于VHDL语言设计实现的4位十进制的频率计及其在试验箱上的管脚连接-Based on VHDL language design of the realization of the four decimal frequency meter
adding-counter-
- 基于VHDL语言实现的 4位十进制频率计的设计及其仿真-Based on VHDL language implementation of four decimal frequency meter design and its simulation
counter
- 十进制计数器 产生0·999的计数,十进制输出显示即可- counter
LEDmod
- 基于stm8数码管显示模块,实现超出位数滚动显示,某一位或全部闪烁,某位小数点显示,以十进制或十六进制输出-Based stm8 digital display module, beyond the median rolling display, a one or all of the flashes, one of the decimal point displayed in decimal or hexadecimal output
calculator
- 基于51单片机的计算器,可实现简单加减乘除、及十进制转化为二进制的功能。-Based on 51 SCM calculator, may realize the simple add, subtract, multiply and divide, and decimal into binary function.
Electronic-Lock-(VHDL)
- 开锁代码为2位十进制并行码。 当输入的密码与锁内的密码一致时,绿灯亮,开锁;当输入的密码与所内的密码不一致时,红灯亮,不能开锁。 密码可由用户自行设置。 密码可由七段数码管显示出来。 -The design is based on the VHDL language, using the MAX+ plusII parallel electron two locks design, and design process described in detail. VHDL lan
receive
- 单片机上电后等待从上位机串口发送来的命令,同时在数码管的前三位以十进制方式显示A/D采集的值。-Waiting for commands from the host computer serial port to send to the microcontroller is powered on, the top three in the digital tube display A/D acquisition in decimal value.
10jinzhijishuqi
- 基于fpga的十进制计数器,开发环境为maxpius-Decimal counter fpga-based development environment for maxpius
exp_cnt_xuehao365_7seg
- 计数器 数码管 3位十进制 exp_cnt_xuehao365_7seg.vhd为顶层文件-Counter digital tube three decimal exp_cnt_xuehao365_7seg. VHD for top level file
freq
- 在Quartus下VHDL编写的一个频率测试模块,自动转换为十进制数字输出到数码管上。-A frequency test modules written in VHDL in Quartus under are automatically converted to the decimal number is output to the digital tube.
Count-display-circuit-design(VHDL)
- 用VHDL语言设计计数显示电路。设计输出为3位BCD码的计数显示电路。由三个模块构成:十进制计数器(BCD_CNT)、分时总线切换电路(SCAN)和七段显示译码器电路(DEC_LED)-VHDL language to count the display circuit. The design output for display circuit 3 BCD count. Consists of three modules: the decimal counter (BCD_CNT), time
Digital-Calculator
- 用汇编语言编写一个能实现四则混合运算、带括号功能的整数计算器程序。程序能实现键盘十进制运算表达式的输入和显示,按“=”后输出十进制表示的运算结果。-A four hybrid operation, with brackets function integer calculator program written in assembly language. Program to achieve keyboard decimal arithmetic expression input and out
disp
- 用数码管前两位显示一个十进制数,变化范围为00~59,开始时显示00,每按下S2键一次,数值加1;每按下S3键一次,数值减1;每按下S4键一次,数值归零;按下S5键一次,利用定时器功能使数值开始自动每秒加1,再次按下S5键,数值停止加1,保持显示原数。-Digital tube first two shows a decimal number, range 00 to 59, the beginning of display 00, press S2 button once, increment
ad
- 用单片机控制ADC0804进行数模转换,当拧动实验板上A/D旁边的电位时,在数码管的前三位以十进制方式显示出A/D转换后的数字量(8位A/D转换后数值在0~255变化)。-SCM ADC0804 digital to analog conversion, when the twist on the experimental board next to the A/D potential, the top three digital tube shown in decimal, digital A