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二进制小数转换
- 二进制小数转为十进制BCD码的汇编程序，结果保留四位并在七段数码管上输出-decimal to binary decimal BCD compilation procedures, and results in four reservations in paragraph 107 digital output tube
几个汇编代码code
- fx.asm 反序输出 cpc.asm 人机对话 DECHEX.ASM 十进制到十六进制转换 PX.ASN 排序 DISP.ASM 显示非组合BCD码 COUNTA.ASM 统计字符A的个数 GRA.ASM 格雷码 TADD.ASM 加法运算 TMUL.ASM 乘法运算-fx.asm sequence output cpc.asm anti-human-machine dialogue DECHEX.ASM decimal to hexadecimal c
LED_ARITHMETIC
- TMS320LF2407显示子程序,将16进制转化为十进制,然后分别显示在4个LED上-TMS320LF2407 and display of 16 conversion to decimal band, and then shown separately in the last four LED
CHANGE10_16
- 用AT89c52单片机来编的将十进制转化成十六进制-AT89c52 used to produce the single-chip microcomputer familiarizing into hexadecimal
shuzipinlvji
- 四位十进制数码显示、量程自动转换的数字频率计。-four decimal digital display, automatic conversion range of frequency meter.
24wei10jinzhiPINLVJI
- 可编程逻辑设计的程序！24位十进制频率计！可使ＥＤＡ实验年箱测量指定频率！-programmable logic design process! 24 metric Cymometer! EDA will experiment, measurement designated frequency bins!
二进制转化十六进制浮点数
- 我用VC写的十进制与十六进制数的转化程序，绝对独创，可用于需要浮点运算的单片机编程数值转化。-I write with VC metric hexadecimal number and the conversion process, absolutely original and the need for the floating-point operations into numerical microcontroller programming.
FTCTRL
- 四位十进制频率计的顶层控制模块，用于生成测频需要的复位及控制信号-four decimal frequency of top-level control modules, used to generate the required frequency measurement and control signals reset
MCS5_uCOC_II
- 移植到MCS51的uCOS_II。 1。在文件OS_CORE.C中OSMapTbl和OSUnMapTbl数组用于查表，所以应该放在code里。 增加code关键字。UCOS_II.H和OS_CORE.C。 2。OS_CFG.H堆栈大小MaxStkSize改为900。 3。OS_CPU_C.C的InitTimer0函数增加了关于开T0中断的解释。 允许T0中断，此时EA=0(51上电缺省值)，中断还不会发生，满足在OSStart()前不产生中断的要求。
cpld_circuit
- 基于CPLD的二进制码转换为二十进制（BCD）码的电路[1].pdf-based CPLD binary code into two decimal (BCD) code circuit [1]. Pdf
b16tod5
- pic单片机程序,用于数制转换,可将16位二进制数转换成5位十进制数.-pic microcontroller procedures for a number of system conversion, 16 can be converted into binary-decimal number five.
COUNT_10
- VHDL源代码.设计一个带有异步清0功能的十进制计数器。计数器时钟clk上升沿有效，清零端为clrn,进位输出为co。 -VHDL source code. Asynchronous design with a 0-counter function of the metric system. Counter clock clk ascending effective end to reset clrn, rounding output co.
BCDADD
- 本程序完成多个BCD码加法,并完成到十进制裁转换-completion of the procedures BCD adder, and complete the conversion to decimal Conference
Seg2
- Dsp2407 七段显示器 动作：四位数扫描计数器，以十进制显示0000~9999 以快速或动态执行观察PA及PB脚输出的变化 -Dsp2407 paragraph 107 monitors movements : the four-digit scanning counter, in the metric system showed 0,000 ~ 9,999 to rapid or dynamic observation PA and PB output pin changes
vhdl_clock
- VHDL实现数字时钟，利用数码管和CPLD 设计的计数器实现一个数字时钟，可以显示小时，分钟，秒。程序主要要靠考虑十进制和六十进制计数器的编写。 以上实验的程序都在源代码中有详细的注释-VHDL digital clock, the use of digital control and CPLD design to achieve a number of counter clock, show hours, minutes and seconds. The procedure depends
IOc51
- 用P1口，一位接按键输入，四位接LED输出显示一个四位二进制数，每次按键，二进制数加1 P1口用4*4键盘输入，P0口接1位数码管显示16个键，分别显示0—F 实现一位十进制计算器功能-with P1, an access key input, then four LED output showed a binary number four, each button. plus a few binary P1 mouth 4 * 4 keyboard input, P0 I receiv
decimal-to-bcd
- 绝对好用的十进制转BCD码C语言源代码，编成转换常用的程序，欢迎下载。-absolutely good for the metric system to BCD C language source code, converted into common procedures, welcomed download.
MetricationsentineladditionandsubtractionCalculato
- 设计十进制定点加减法计算器。要求能(不同时)显示6位输入和7位输出 (保留4位小数)-design metric sentinel addition and subtraction calculators. Can be requested (not simultaneously) shows six input and output 7 (reservations four decimal)
FreqCounter
- 一个有效位为4位的十进制的数字频率计,VHDL语言编写，已在硬件实验箱上实验通过。-an effective place to four the number of decimal frequency meter, VHDL language, in the box on the experimental hardware experiment.
Dicimal_BCD_caculation
- 这是MCS51单片机十进制运算子程序库，包括：单字节、双字节、多字节的加法、减法、乘法、除法、开方运算等。-This is the MCS51 metric calculation subroutine library, including : single-byte and double byte. Multi-byte addition, subtraction, multiplication, division, etc. rooting.