搜索资源列表
fir-vhdl
- 用Vhdl硬件描述语言编写的FIR数字滤波器-Vhdl using Hardware Descr iption Languages in preparing the FIR digital filter
LMS-vhdl-coad-
- 基于quartus的LMS 自适应滤波器代码，适合初学者 -The LMS adaptive filter based on quartus code, suitable for beginners
FIR
- FIR结构数字滤波器，64阶。在Altera FPGA上验证通过-FIR digital filter structure, 64 bands. Verified by the Altera FPGA on the
FIR-filter-VHDL-code
- 基于FPGA的17阶FIR滤波器VHDL代码。文件附带了FIR数字滤波器理论的介绍。-FPGA-based 17-order FIR filter VHDL code. File with the FIR digital filter theory introduction.
Digitalfilter
- 一篇基于FPGA的数字滤波器的小论文，附带有VHDL源码-An FPGA-based digital filter small papers, comes with VHDL source code
FIR_VHDL
- FIR滤波器的VHDL代码,可以修改冲击函数的值-FIR filter VHDL code can modify the impact of the value function
FIR
- 基于FPGA的FIR滤波器设计思想，里面有很好的算法供大家参考-FPGA-based FIR filter design ideas, there are very good for your reference algorithm
vhdl
- FIR滤波器的性能参数 设计一个滤波器最基本的就是性能参数的,决定着滤波器的实际功能.比如阶数,截至频率。 本文滤波器设计参数 ①输入,输出数据宽度10位 ②阶数为4阶的线性相位FIR滤波器， ③类型:带通 -FIR filter performance parameters The design of a filter is the most basic performance parameters, determines the actual filter fu
3
- FIR数字滤波器的优化与验证 -FIR digital filter optimization and verification FIR digital filter optimization and verification
ImplementLUT-baseFIRFilterwithVHDL
- 用VHDL语言实现查找表方法有限冲击响应滤波器-VHDL language used lookup table method to achieve finite impulse response filter
FIR
- FIR滤波器的VHDL源代码及测试文件，已通过编译仿真，绝对正确。-FIR filter VHDL source code and test files, has passed the compiled simulation, absolutely correct.
fir
- 数字电路设计中的，fir滤波器设计，我做的是8位宽的，利用vhdl实现，附带了完整的代码，报告，我没有对我的信息进行删除，是希望大家能够诚实的利用这个代码，提高自身本领。-Digital circuit design, fir filter design, I am doing is 8 bits wide, using vhdl implementation, with a complete code, the report, I did not delete my information i
LAB31
- EDA基础_综合实验篇__实验三十一 FIR数字滤波器设计-The basis of comprehensive experimental articles EDA __ _ experimental FIR digital filter design 31
IIR(vhdl)
- 基于fpga的数字滤波器设计的vhdl源代码-Fpga digital filter design based on the vhdl source code
IIR_filter_design
- IIR滤波器的vhdl语言设计的简单滤波器-vhdl for iir filter
Firdesi
- FIR滤波器的设计 FIR滤波器的设计-Biomedical signal processing Biomedical signal processing Biomedical signal processing
32jie-vhdl-fir
- 32阶数字滤波器 没有时间来得及精简 不好意思了的说 呵呵 -32-order digital filter is not time enough time to streamline embarrassed to say Oh
FIR-filter-vhdl
- 工程：用VHDL语言实现的FIR滤波器设计。-FIR filter using vhdl using QuartusII
FIRFILTER
- 16阶数字滤波器 VHDL语言编写 已经全部编译成功-16-order digital filter VHDL language have all been compiled successfully
VHDL
- 滤波器 VHDL 应用VHDL基于FPGA设计FIR滤波器-Application of VHDL-based FPGA VHDL filter FIR filter design