VHDL数字钟设计程序 设计要求 基本要求： 1、24小时计数显示； 2、具有校时功能（时，分） ； 附加要求： 1、实现闹钟功能（定时，闹响）；,VHDL digital clock design process design requirements for the basic requirements: 1,24 hours count display 2, with a school function (hours, minutes) additio

用51单片机做的ID卡门禁系统，带12864液晶显示，通过触发继电器来控制门禁。附带原理图和PCB板。-Done with 51 single-chip ID card access control systems, liquid crystal display with 12864 through the trigger relays to control access. Attached schematic and PCB board.

基于51单片机的门禁卡系统源码， 硬件： MCU STC89C52 射频芯片：MFRC500 TAG：MF S50卡 完成了读卡，写卡，加密功能，可用于门禁系统，餐饮收费系统。 -51 MCU-based access control card system source code, hardware: MCU STC89C52 RF chip: MFRC500 TAG: MF S50 cards completed a reader, writing cards, en

用51单片机做的数字闹钟，通过LED显示时间，通过按键调整时间和闹钟时间-Done with 51 single-chip digital alarm clock, LED display, through time, through the buttons to adjust time and alarm time