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dsp-exp
- 数字信号处理课程,1.信号采样及编程环境;2.信号、系统及频响,用于学生上机练习。
verilog1
- 用verilog语言编写的6分频分频计数器。分频后用来控制蜂鸣器响,也可以修改代码做成更高分频的计数器。压缩包内也包含此分频器的modelsim仿真文件-Verilog language with 6 frequency divider counter. Frequency and used to control the buzzer sound, you can modify the code to make a higher frequency counter. Compressed pac
cpgnhsfsq
- 测频功能的函数信号发生器,详细的介绍。熟悉示波器、信号发生器、稳压电源及晶体管毫伏表的正确使用,重点要求学会使用示波器观测信号波形、幅值、占空比及放大器的频响特性。-A function of frequency measurement function signal generator
9_TheBell
- FPGA,VHDL语言 蜂鸣器 响0.5S~~,时钟分频源程序,适用于所有FPGA芯片-FPGA, VHDL language buzzer 0.5S ~ ~, clock divider source, applicable to all FPGA chip! !
1511-Horn-2013.07.12
- 1511喇叭自动测试,可测试,喇叭的频响曲线!以及SPL!-It can test the automatic test, 1511 horn, loudspeaker frequency response curve! And SPL!
DSP-Sound-processor-
- 硕士论文。主要包括:1、升频差值的matlab仿真与实现 2、延时、混响和均衡效果的实现 3、基于心理学模型和噪声整形的matlab仿真与听声测试 4、音频处理算法的DSP实现-Master thesis. Mainly includes: 1, litres, the difference of the frequency of MATLAB simulation and 2, to achieve delay, reverb, and the effect of equalization t