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16阶FIR滤波器--本设计用VERILOG HDL语言串行DA算法实现16阶有限频率响应滤波器！-16-order FIR filter- this design language VERILOG HDL serial DA algorithm limited frequency response of 16-order filter!
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用verilog写的16阶串行DA算法FIR滤波器-Verilog written by 16-order FIR filter serial DA algorithm
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DSP通过c语言编程实现16阶低通FIR-Programming a DSP 16 through the c-order low-pass FIR
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用Verilog写的fir滤波器，16阶8位位宽，看看吧-Written using Verilog fir filter, 16-order 8-bit wide, to see if it
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16阶的FIR滤波器的verilog文件，包含了测试报告。-16 order FIR filter verilog file contains a test report.
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DSP设计的FIR滤波算法，自适应滤波器采用16阶的FIR滤波器-FIR filtering algorithm for DSP design, adaptive filter using 16-order FIR filter
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16阶FIR滤波器设计的verilog代码-Verilog 16-order FIR filter
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