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OPERATION_UNIT
- 本程序为加密芯片内部加密运算单元部分，包括32位减法器、移位寄存器、加/减法器、寄存器等，对密码芯片运算部分设计具有一定指导意义-The procedure for encryption chip unit internal encryption algorithms, including 32-bit subtraction, and shift register, add/subtraction, and register and so on password-chip design has
Verilog
- 32位存储器Verilog附带test文件，可以在modulesim仿真 还有加法、减法器，译码器等常用Verilog器件，都附带仿真test。-Memory test with Verilog
adder4-7seg
- 这段程序主要是实现了两个16进制的数据相加减，主要思想是由32位的进位加法器的来。目标板是spartan 3的实验板。-This program is to achieve a two-phase addition and subtraction of data 16 hex, the main idea is to carry the 32-bit adder to. Target board is spartan 3 development board.
fudian_sub
- 实现32位浮点减法器，具体结合加法器和乘法器来实现快速傅里叶变换。-use VHDL to finish the sub device.
fudian_mul
- 实现32位浮点减法器，具体结合加法器和乘法器来实现快速傅里叶变换。-use VHDL to finish the sub device.