搜索资源列表
AN151
- AMBA Application Note: AN151 - Using EB with example AXI Logic Tile. -AMBA Application Note: AN151- Using EB with example AXI Logic Tile. This example shows how to use the EB baseboard with an example AXI Logic Tile. The following board c
handshake
- AMBA 3 AXI handshake protocol. Verilog platform. master and slave.
AMBA
- SystemC写的AMBA 3.0 AXI总线事物级TLM模型 正在调试。有详细实验报告说明。-AMBA 3.0 AXI TLM SystemsC
AMBA-Specification-Rev-2.0
- AMBA2.0总线协议详细介绍，共230叶英文资料-AMBA2.0 bus protocol details, a total of 230 leaves information in English
AMBA_axi_classic_protocol_document
- AMBA axi经典协议文档值得参考学习的资料AMBA axi classic protocol document-AMBA axi protocol documentation is also useful to study classical information AMBA axi classic protocol document
Axi_mux
- The elements come from the necessity of creating generic modules, in the verification phase, for this widely used protocol. These primitives are presented as a not compiled library written in SystemC where interfaces are the core of the lib
AxiPC
- fpga axi测试程序,可测试符合axi协议的ip核-fpga AXI4 TEST routine，can be used to test ip which is in amba.
AMBA
- AMBA 协议是用于连接和管理片上系统 (SoC) 中功能模块的开放标准和片上互连规范。它有助于首次开发带有大量控制器和外设的多处理器设计。AMBA 通过使用 AXI、AHB、APB 和 ATB 的规范对 SoC 模块的共同主干进行定义，这有助于设计的重复使用。-AMBA protocol is used to connect and manage on-chip (SoC) functional modules of open standards and on-chip interconnec
AMBA_AHB.rar
- amba AHB coding in verilog HDL and integrating with AHB to AXI Brigde,amba AHB coding in verilog HDL and integrating with AHB to AXI Brigde
verilog-master-files
- Verilog master files of AMBA axi interface
AMBA_AXI-bus
- ARM AMBA AXI总线原理分析，详细说明了AXI总线原理；-ARM AMBA AXI bus details, details the AXI bus principle
axi_ipif_v2.3
- The AXI4-Lite IP Interface (IPIF) is a part of the Xilinx family of Advanced RISC Machine (ARM) Advanced Microcontroller Bus Architecture (AMBA) Advanced eXtensible Interface (AXI) control interface compatible products. It provides a point-to-point
arm_amba_reference_manual.tar
- ARM AMBA REFERENCE MANUAL! 2011 YEAR
AMBAaxi
- amba axi specification
axi_slave
- amba总线中axi的slave部分，用verilog实现的slave.(The slave part of Axi in the AMBA bus, slave. implemented with Verilog)