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Cordic算法实现DDS的Verilog 源码,14位精度，非常实用的。-DDS algorithm Cordic the Verilog source code, 14-bit accuracy, very practical.
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Verilog作业 ：自己写的源码输入，补码输出的，由状态机控制的四位加法器，为保证时序，加法器模块为超前近位加法器，包含测试台，通过 Modelsim 、Synplify仿真。-Verilog operation: the source code to write their own input, complementary code output by the state machine to control the four adder, in order to ensure timing
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verilog编程开发的cordic例程，计算SIN,COS功能与计算幅值角度功能可设定，运算宽度可设定，并有完善的TESTBENCH。-Verilog programming developed CORDIC routines to calculate SIN, COS function and calculating the amplitude of the perspective of function can be set, computing the width can be set,
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基于改进的查找表的arctan计算模块，包含完整的VHDL源代码及部分注释．绝对原创！-Arctan calculation module based on improved searching form. The rar package contains complete VHDL source code and some notes. Absolutely original!
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verilog code for magnitude cordic algrithm
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verilog code for division based on cordic algorithm
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vhdl语言编写的cordic算法，实现了cordic的流水线运算。-cordic language vhdl algorithm cordic the pipeline operator.
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迭代结构的cordic算法的硬件代码，基于verilog编写-The structure of cordic iterative algorithm based on verilog writing code, hardware
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CORDIC算法设计的数字计算机，基于Verilog设计-CORDIC algorithm based on the design of digital computer, Verilog design code
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cordic algorithm using verilog code
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CORDIC算法相角模式HDL实现源码，Verilog HDL书写，10级迭代，仿真验证通过。-CORDIC algorithm implementation phase model HDL source code, Verilog HDL writing, 10 iterations, the simulation is verified.
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FPGA结合DSP设计，如FIR、IIR滤波器，CORDIC算法,多重采样率信号处理，FFT,有对应的VHDL/Verilog 代码code-FPGA Combines with DSP, FIR 、IIR Digital Filters,CORDIC,FFT,Adaptive Filters，VHDL/Verilog code
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实现cordic算法旋转模式的verilog代码-Verilog code for cordic algorithm rotation mode
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CORDIC算法的流水线verilog HDL实现，包含modelsim仿真所需的设计文件与testbench。-This is an implementation of CORDIC algorithm in verilog HDL, which contains design code and testbench.
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cordic算法的基本原理的文档，verilog源代码，非常易于理解。-The basic principle of cordic algorithm documentation, verilog source code, very easy to understand.
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cordic代码 verilog语言 产生三角波 适用在ISE上面-cordic code verilog language triangular wave generated above apply at ISE
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FPGA实现基于Cordic算法的流水线结构设计，相关verilog语言代码-FPGA to realize the Cordic code
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Verilog实现的cordic算法的计算sin，cos值得模块，使用rom，代码简洁有效。-Verilog implementation of the cordic algorithm of computing the sine and cosine worth module, use of ROM, the code is concise and effective.
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