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bulksrc
- 毕业课题部分程序： CY7C68013 Bulk IN 68013工作在AUTO IN模式，16位总线 SLAVE FIFO.MASTER是 ADI BF533。
USB2.0_Slave_FIFO_Sync
- This a CY7C68013 (USB2.0 Chip) Configuration example for Slave FIFO Mode with Sync Signal.
USB2.0_Slave_FIFO_ASync
- This an USB2.0 chip CY7C68013 Configuraion Example for Slave FIFO mode with \"async\" mode.
68013FIFOIN
- Verilog HDL 编写的CY7C68013 SLAVE FIFO接口程序，实际测试可用。可以直接跟上位机连接，传输数据。
CY7C68013FPGA
- USB控制芯片cy7c68013与FPGA通过slave fifo方式通信，块传输数据-USB controller chip and FPGA cy7c68013 way communication through the slave fifo, block data transfer
implementing_an_8_bit_asynchronous_interface_with_
- 2个Cy7c68013之间的GPIF与Slave FIFO异步通讯方案，以及源码-2 CY7C68013 between GPIF and Slave FIFO asynchronous communications programs, as well as source
usbin_v1.7
- 用于cy7c68013与fpga的从FIFO通讯.版本1.7-For the CY7C68013 and FPGA communications from the FIFO. Version 1.7
ImplementingFIFO-GPIF
- USB 2.0 FIFO 工作模式 C语言编程 CY7C68013单片机-USB 2.0 FIFO mode of C language programming CY7C68013 Singlechip
SLAVE_FIFO_16BITS
- 68013和FPGA通信 含有68013 slave firmware 含有FPGA VHDL程序-communication between 68013 and FPGA including 68013 slave firmware including FPGA VHDL code
fw
- cy7c68013 FIFO 例子 高速读FIFO，速度达到43M，已测试-cy7c68013 FIFO examples of high-speed read FIFO, speed of 43M, have been tested
usb
- 实现USB的数据传输功能，采用Slave Fifo模式的一些资料和CY7C68013芯片的驱动程序 -USB data transfer function to achieve, by Slave Fifo mode of some of the information and the CY7C68013 chip driver
FX2SlaveFIFO
- CY7C68013 FX2 Slave FIFO.rar
cy7c68013-Slave-FIFO
- cy7c68013 slave fifo fw
fifo
- cy7c68013 fifo代码，可实现in配置-cy7c68013 fifo code can be realized in the configuration
Apptest
- cy7c68013写fifo速度测试的代码-the CY7C68013 write the fifo speed test code
Cy7C68013-slavefifo-design.rar
- 使用Cypress的Cy7C68013A芯片进行设计，实现Slave FIFO模式的数据采集。程序包括USB固件程序以及主机程序。,Using Cypress' s Cy7C68013A chip design, data acquisition Slave FIFO mode. The program includes a USB firmware and host program.
Bulkloop1
- CY7C68013固件，从FIFO模式，CPU不参与数据传输，使用EP2 和EP6端点，同步模式，批量传输模式-CY7C68013 firmware from the FIFO mode, the CPU does not participate in data transmission, using EP2 and EP6 endpoint, synchronous mode and bulk transfer mode
CY7C68013 Slave FIFO
- CY7C68013 Slave FIFO
FX2LP-firmware
- cy7c68013 同步Slave fifo传输 固件。 经测试，速度可以达到每秒40MB以上。 网上很多代码均为异步，速度最多只能到10多MB。注意：因为和FPGA配套，时钟是外部提供，若有不明，可以联系我。-cy7c68013 slave fifo sync transfer firmware. Speed up to 40MB/s.
usb slave fifo 测试程序 cy7c68013
- usb slave fifo altera FPGA测试程序 cy7c68013方法的示例程序！可以参考！