搜索资源列表
USB
- FPGA数字电子系统设计与开发实例导航--USB-FPGA digital electronic systems design and development of navigation example- USB
THS1206
- FPGA来实现数据采集,AD采用TI公司的THS1206,高速并行AD,内含16字FIFO,降低硬件复杂度。-FPGA to realize data acquisition, AD using TI company s THS1206, high-speed parallel AD, containing the 16-character FIFO, to reduce hardware complexity.
FPQ
- 基于FPGA的数控分频器,可以吧一个时钟信号分成不同频率的时钟信号。-FPGA-based digital frequency divider, a clock signal can now be divided into different frequency clock signals.
FPGAboxin
- FPGA实现波形产生模块能产生正弦,方波,锯齿,三角波的产生,频率可调-fpga
dds
- fpga利用dds原理,产生正弦波,简单实用,成本低-fpga using dds principle, have a sine wave
200M_DA_AD
- 自己编的,用FPGA实现软件DDS调幅。编程语言是VHDL。拿出来相互学习一下。-Own, and with FPGA AM DDS software. Programming language is VHDL. Look out to learn from each other.
DDS
- FPGA实现直接数字频率合成(DDS),使用EP1C3T144C8通过调试-Cyclone,aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
fpga.doc
- this gives detail about FPGA kid you can get fpga kid for learning purpose
FPGA_PCI_DATA
- 一个基于FPGA的PCI数据发送程序,实现从计算机通过PCI9054向FPGA发送数据功能。开发语言verilog,开发环境quartus-FPGA-based PCI data distribution process, from the computer through the PCI9054 functions to send data to the FPGA. The development of language verilog, development environment qua
FPGA_SOPC
- fpga的基础实验,SOPC的入门实验初学者-fpga experimental basis, SOPC beginners entry experiment
FPGALCD
- FPGA控制LCD128*64程序,时序已仿真引脚锁定,并在硬件能够上实现汉字显示。-FPGA control LCD128* 64 procedures have been timing simulation, and hardware to achieve display of Chinese characters.
Altera_FPGA_pwm
- 基于FPGA(ALTERA公司的FPGA)PWM的测试程序。-Based on FPGA (ALTERA' s FPGA) PWM test procedures.
Altera_FPGA_motor
- 基于Altera的FPGA的开发板的PWM测试程序。板子是周立功的MagicSOPC的。-Altera' s FPGA-based development board of the PWM test procedure. Ligong week the board is the MagicSOPC.
mcu-fpga
- 用于MSP430的定时器功能的程序段,使大家可以充分了解和熟练单片机定时器的使用。-MSP430 timer function for the program segment and to enable them to fully understanding and proficiency in the use of single-chip timer. 搜索
Actel_Igloo_nano_UART
- This FPGA project include a simple version of the UART for Actel Igloo nano.
dds
- DDS文件夹内的程序,完成直接数字频率合成功能,有正弦,三角,方波三种波形,并能扫频. 可通过键盘操作设置频率参数和选择波形种类和控制运行. 由两部分组成,"C"文件夹内,是用于在 51 单片机上运行的 C语言程序, "Verilog"文件夹内,是用Verilog语言编写的 FPGA 程序-ewfreytrgrwf reggwrter rgterthhrgdfs rgdgf egrthg rgreaf rtgerf srfefsf frafgsf frghrsrgwgt
ddsdds
- 摘 要:介绍了直接数字频率合成 (DDS) 技术的基本原理,给出了基于Altera公司FPGA器件的一个三相正弦信号发生器的设计方案,同时给出了其软件程序和仿真结果。仿真结果表明:该方法生成的三相正弦信号具有对称性好、波形失真小、频率精度高等优点,且输出频率可调。关键词:直接数字频率合成;现场可编程门阵列;FPGA;三相正弦信号 (2009-01-04, VHDL, 99KB, 9次) -hgfhtht rrgtsrt rthg rgrswt sgethwrathwtHY TSRTTHSRH
2
- FPGA设计中几个基本问题的分析及解决 多时钟系统,时钟设计,时钟歪斜,门控时钟,毛刺信号及其消除,FPGA中的延时设计,FPGA设计应注意的其它问题-FPGA design analysis of a few basic questions and solve multi-clock system, clock design, clock skew, clock gating, and the elimination of burr signal, FPGA design of the d
FPGA
- FPGA由可编程逻辑单元阵列、布线资源和可编程的I/O单元阵列构成,一个FPGA包含丰富的逻辑门、寄存器和I/O资源。一片FPGA芯片就可以实现数百片甚至更多个标准数字集成电路所实现的系统-FPGA:FieldProgrammable Gate Array VECTOR:WIDTH— R-1 DOWNTO
TheDesignofFIRFilterBasedonFPGA
- 从分析FIR 数字滤波器的原理和设计方法入手,主要针对基于FPGA 实现数字滤波器乘法器的算法进行了比较研究,并通过一个8 阶FIR 低通滤波器的具体设计,简要分析比较了几种算法的优越性和缺点,从而充分发掘和利用FPGA 的高速特性。-From the analysis of FIR digital filter design theory and approach, mainly based on the realization of digital filter FPGA multiplie