搜索资源列表
Camera_Interface_Verilog
- 该源代码包是基于片上系统的摄像头接口的Verilog语言程序，它包括以下5部分：RTL源代码，测试平台，软件仿真C代码，FPGA综合时的sdc和ucf文件，说明文档。-This source code package is the camera interface module based on the SoC use Verilog language. It has the following 5 parts: RTL code, testbench, software simulating
DesignReuseMethodology
- 本文介绍了在进行FPGA设计，特别是SOC设计时，为了保证顺利移植，重新利用原有程序，而应该注意的一些基本问题和方法，本文由xilinx提供，但对所有的FPGA的使用者都有非常好的借鉴意义。-In this paper, during the FPGA design, especially in SOC design, in order to ensure a smooth transfer, re-use of existing procedures, but should pay atten
FPGA_DESIGNED
- 曾经的硕士论文，基于FPGA的8051的soc核研究，用FPGA实现的51核，对FPGA的学习很有帮助-Have master' s thesis, based on the FPGA of the soc of the 8051 nuclear research, with FPGA to achieve the 51 nuclear, helpful for learning FPGA
soc
- SOC中的典型模块，是SOC必备的模块，可用于FPGA，嵌入式开发必备代码。-SOC in a typical module, the module is essential SOC can be used for FPGA, embedded code development required.
soc-gr0040-010309
- xsoc vhdl verilog risc cpu soc implementation in very liitle cpld or fpga
lariviere2008uclinux
- xsoc vhdl verilog risc cpu soc implementation in very liitle cpld or fpga
Eat_beans_on_the_8086_games
- 本项目在FPGA上生成8086指令兼容的软核以及外设，并在此基础上跑通pc机上古老但是仍然有趣的吃豆子PACMAN游戏， 作为本科微机原理课程的实验。 通过本项目，学生可以学习到8086的基本结构， 在TurboC下如何进行嵌入式C语言编程，汇编语言， 计算机组成等基本原理， 有独立设计基于8086的SOC软硬件的能力。-The project generated in the FPGA on the 8086 Directive, as well as soft-core-compatible
I2C
- I2C主机端模块 具有avalon-MT总线接口 可挂载在Altera soc系统之上 使NiosII处理器具备I2C通信能力 模块由Verilog HDL编写 并经Cyclone II FPGA测试-I2C master modul which has a avalon-MT interface that can be attached to Altera SOC system. It provides NiosII I2C communication capability . This mo
FPGA_SOPC
- FPGA/SOPC开发快速入门教程，FPGA 在复杂逻辑电路以及数字信号处理领域中扮演者越来越重要的角色，SOC（片上系统）以其低 功耗，高性能，低成本，高可靠性等优点成为嵌入式系统的发展趋势。作-QUARTUS II platform based on the VHDL language elevator system control procedures.
jiyuFPGAdeSOCshejiyanjiu
- 基于FPGA的SOC设计技术研究.kdh-FPGA-Based SOC Design Technology. Kdh
Alrera-FPGA-SOC-Cyclone-V
- Alrera FPGA SOC Cyclone V 官网开发板调试记录-Alrera FPGA SOC Cyclone V official website development board debug log
aib-01017-soc-fpga-overview
- Altera SOC platform overview for Stratix-V, ArriaV FPGA families, with ARM Cortex A9 Dual COre Hard Macro embedded. This is a seminar document, attended in May 2013
uCOS-II-Cyclone-V-SoC
- 应用在ALTERA FPGA芯片的UCOS开发板实现代码,从micrium官网下载-μC/OS-II Example for the Cyclone V SoC Development Kit
audio on fpga
- THis is the project that demonstrate the audio system on fpga basement. From this starting piont, other researcher can develop their own project easily
Altera-SOC-FPGA
- 讲述了Alteral公司SoC FPGA的几个应用实例- U8BB2 u8FF0 u4E86Alteral u516C u53F8SoC FPGA u7684 u51E0 u4E2A u5E94 u7528 u5B9E u4F8B
Zet-1.3.1
- 在单片FPGA上实现九十年代初期PC，可安装Windows3.1及其他DOS系统。SOC中包含以80286(cpu),中断控制器,显示控制器(VGA),声音控制器,PS2(鼠标，键盘)等。是了解计算机历史变迁及学习SOC设计的重要资料！(ZET aims to implement an early 90`s PC on FPGA.Which include a 80286(cpu),interrupt controller,display card(VGA),sound card,PS2 int
XilinxVirtualCable-master
- Xilinx虚拟连接，这是一种基于TCP/IP协议的通信技术，以实现JTAG功能，通过这样的连接，可以访问开发的FPGA或者SOC，而不需要通过传统的JTAG电缆。(Xilinx Virtual Cable (XVC) is a TCP/IP-based communication protocol that acts like a JTAG cable and provides a means to access and debug your FPGA or SoC design wi
Z-turn-examples-master
- # Z-turn-examples The repository with my simple Z-turn examples, to be used as templates for more serious projects. Please note, that the Buildroot configuration in my designs sets the root password to "test". Setting the password is n
CV_FPGA_to_HPS_Bridge_Design_Example
- FPGA通过AXI总线传输数据给ARM,ARM使用DMA方式接收数据！(FPGA to ARM Bridge design example)
h264enc_v1.0
- H.264的FPGA实现,包括详细的仿真文件(h.264 fpga http://soc.fudan.edu.cn/vip)