搜索资源列表
poc1
- poc的VHDL详细设计 实现握手信号的交互 -poc of VHDL handshake signal to achieve the detailed design of interactive
vhdl
- 基于VHDL的POC编写与实现 实现三次握手-VHDL-based preparation and implementation of the POC to achieve three-way handshake
poc
- 用VHDL语言讲述输出控制器（POC）的设计，这是大学课程的设计-VHDL language used on the output controller (POC) design, This is the design of university courses
pocp
- 简单的i/O接口的vhdl设计，包括工程，源码，仿真波形，为POC型的接口-Simple i/O interface of the VHDL design, including engineering, source code, simulation waveforms, for the POC-based interface
POC
- 东南大学学生数字系统设计实验：用VHDL语言编写Printer与CPU互连的接口程序-Southeast University students in the experimental digital system design: VHDL language with Printer and CPU interface interconnection procedures
CPU
- 实现简单CPU功能的源码，可以实现加减乘除和移位功能，VHDL代码，程序运行在MAX PULS和Quartua上。-The purpose of this project is to design and simulate a parallel output controller (POC) which acts an interface between system bus and printer. The Altera’s Maxplus Ⅱ EDA tool is recommended
poc
- 连接CPU与外部器件printer的接口元件，用VHDL语言编写，可进行仿真-CPU and external devices connected printer interface components, with the VHDL language, can be simulated
POC
- 用VHDL语言设计的poc （并行输出控制器） 用法：中断模式 和 查询模式-Using VHDL language design poc (parallel output controller) Usage: interrupt mode and query mode
POC-Project
- 系统总线与打印机之间的借口：并行输出控制器POC的设计。涉及POC与CPU，POC与printer之间的握手操作。-Between the system bus and an excuse for the printer: parallel output controller POC design. Involved in POC and CPU, POC and the printer handshake between the operations.
POC
- 基于VHDL开发POC接口代码，主要用于cpu和打印机之间的数据处理控制-VHDL code development based POC interfaces, cpu and the printer is mainly used for data processing control
POC_all
- poc即为cpu与外部设备，比如打印机的接口，用VHDL的编程来实现poc功能的仿真-poc is the cpu with an external device, such as the printer' s interface, programming with VHDL simulation capabilities to achieve poc
parallel-output-controller-(POC)
- 并行输出控制器，实现CPU与打印机之间的通信，程序基于VHDL语言，内附完整实验报告与仿真图像-The purpose of this project is to design and simulate a parallel output controller (POC)which acts an interface between system bus and printer. The Altera’s Quartus II EDA tool is recommended and provid
POCPexperiment
- vhdl课程设计的POC程序，功能完整可直接执行，最终评为优秀-vhdl program designed POC program, full-featured to-run, and ultimately as good
POC
- 用VHDL语言设计一个并行输出控制器POC，作为系统总线个打印机的借口-The purpose of this project is to design and simulate a parallel output controller(poc) which acts an interface between system bus and printer. The Altera’s Maxplus II EDA tool is recommended and provided for simul
Test_POC
- 东南大学VHDL课程POC设计 Verilog语言-Southeast University VHDL course POC designed the by Verilog language
My_POC
- Simulating the functions of POC.(Simulating the functions of POC. In VHDL, with ISE.)
POC
- 实现了计算机系统中作为I/O模块的POC。(It simulates the POC module which works as an I/O module in a computer system.)