搜索资源列表
5
- vhdl的仿真 quartus 2的flv视频 -VHDL simulation of the flv video quartus 2
vgaoutfiles
- vhdl code for obtaining video output through vga port
MAIN_TX_V10
- 8路视频光端机的VHDL源码，此硬件使用以太网的SERDES 借用TBI接口传输PCM视频信号。-8-channel video PDH in VHDL source code
F7-2VT-1DR
- 2路视频光端机的，VHDL源码，使用全FPGA芯片的硬件，内建成帧、时钟、SERDES-2-way video PDH' s, VHDL source code, use the whole FPGA chip hardware, built-in framing, clock, SERDES
cr_counter
- 视频图像的行列计数器基于VHDL的实现，已经调试仿真通过-Video images VHDL-based implementation of the ranks of the counter has been adopted debugging emulator
VGACTL
- VGA VHDL VIDEO CONTROLLER
tron
- Tron game, a video game developed by VHDL.
Video_and_image_Processing
- FPGA开发板实现图像处理 该例子包含了SOPC和NIOS代码，同时有PDF说明-FPGA development board for image processing of the case includes SOPC and NIOS code, while a PDF descr iption
vga_latest.tar
- VGA Driver in vhdl, control of RGB video secuence
videocomposer
- video composer in vhdl
caitiao
- 运用VHDL，Verilog语言编写的实现显示器显示彩条的硬件控制系统，下载到Virtex2Pro实验板FPGA上，外接显示器即可，相当于一个简单的显示卡驱动程序，不过是用纯硬件实现的-The use of VHDL, Verilog language to achieve color display of the hardware control system, downloaded to the FPGA board Virtex2Pro experiment, an external di
vgainterface
- VGA interface design by vhdl language and has been tested. it is useful for beginers of vhdl and video processing leaners!
byzxin_RS232
- RS 232 interface vhdl language programme for video processing pcb board.
vhdl_pal.tar
- VHDL PAL video generating "library" and test usage
fpga-vga
- 本设计介绍了一种利用可编程器件FPGA，应用VHDL和Verilog两种语言实现VGA（video graphic array）图像控制器的设计方案，通过采用FPGA（Filed programmable Gate Array）芯片设计和VGA接口将要显示的数据直接送到显示器主要设计出一些重要图像的各个功能模块，并且通过系统仿真软件和FPGA硬件实验板来验证设计结果的正确性。 本设计首先对FPGA芯片和图像的显示原理以及VGA显示器的控制方法做了清晰的阐述，然后在此基础上使用FPGA设计V
VHDLproject-by-Qian-Yu
- 创建一个实时的视频处理器采用了FPGA技术的系统设计与VHDL。在这个项目中，我们实现滑动窗口滤波器，Sobel算子，一系列传感器和数字显示器VGA模块。-create a real-time video processor using FPGA technology in the course System Design with VHDL. In the project we implement modules for sliding window, sobel lter, a ran
videocpt
- 用VHDl语言实现高速视频数据采集模块代码-High-speed video data acquisition module code language used VHDl
Calculator
- VHDL计算器，涉及PS2输入，VGA视频输出，加法器，BCD转化。可以通过研究代码学习以上知识-VHDL calculator, involving PS2 input, VGA video output, the adder, BCD transformation. You can learn more knowledge through research code
submit
- 用VHDL实现的双人飞机大战。支持PS/2和蜂鸣器。 需要两个CPLD核心协同完成。 含最终效果视频-Multiplayer air fight implemented in VHDL. PS/2 and beeper supported. Two CPLD cores are required to run this demo. Final video includes.
vga
- vga This details a VGA controller component that handles VGA signal timing, written in VHDL for use with CPLDs and FPGAs. Figure 1 illustrates a typical example of the VGA controller integrated into a system. As shown, the VGA controller requires a