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FPGA_NEW_APPROACH_TO_IMPLEMENT_CHAOTIC_GENERATOR.
- In this paper, a new method is introduced to implement chaotic generators based on the Henon map and Lorenz chaotic generators given by the state equations using the Field Programmable Gate Array (FPGA). The aim of this method is to increase the freq
vga_geometry_xps92i_s3_v01_00_03
- Here an embedded System-on-Chip is build, in an Xilinx Spartan-3 FPGA with Microblaze as the processor.A PLB core System is made with the VGA IP core attached to it. The software written for the MicroBlaze processor specifies the object, the color an
BeamformingFPGA
- 波束成型,基于FPGA的波束成型,包括两个文件,一个滤波器,一个xilinx仿真-Beamforming
Fingerprint_Identify
- 本项目名称是:基于FPGA的指纹识别模块设计。 主要内容为:本模块采用xilinx公司的Spartan 3E系列XC3S500E 型FPGA作为核心控制芯片,通过富士通公司的MFS300滑动式电容指纹传感器对指纹图象进行提取,然后对提取的指纹图像进行灰度滤波、图像增强、二值化、二值去噪、细化等预处理,得到清晰的指纹图象,再从清晰的指纹图象中提取指纹特征点,存入外部FLASH作为建档模板。指纹比对时,采用同样的方法获得清晰的指纹图像,建立比对模板,然后将比对模板与建档模板利用点模式匹配
MPMC_NPI
- 这是MPMC的NPI接口的,字节读操作的例子-xilinx mpmc core, npi interface example
sfifo_srl
- 针对XILINX FPGA特有的SRLC16E器件,实现的同期FIFO. 特点:宽度深度可配置,面积小。-SRLC16E Based Synthesise FIFO Implement by Xilinx FPGA. The Size is small and FIFO Width, Length can be configured.
ddr2_hamdec64
- VHDL实现的64bit海明码解码模块。 可适用于 Xilinx FPGA, Altera FPGA。-VHDL Implement 64bit Hamming Code (decode)
Xilinx_constraints.pdf
- detail timing constraint for Xilinx FPGA design
Exp1-Led
- 本次实验使用 Xilinx FPGA的开发工具 ISE6.x,新建一个工程,并进行综合、布局布线、 下载配置。 这里建立的工程是使用 Create-SOPCMB上的发光二极管显示一个八位二进制计数器, 发光二极管亮表示该位为 0。 -Experimental use of the Xilinx FPGA development tools ISE6.x, create a new project, and comprehensive, the layout of wiring, d
xapp460
- xilinx hdmi tx rx verilog code
xapp856
- 基于FPGA的SFI接口实现(VHDL,Verilog and doc)-SFI-4.1 16-Channel SDR Interface with Bus Alignment
counter
- 适用于FPGA Xilinx开发板的Counter程序,计数从0到9999,在板上用4位7段数码管显示,可实现双向计数。-Applicable to FPGA Xilinx development board of the Counter procedures, counting from 0 to 9999, in the board with four 7 digital display, enabling two-way counts.
multiplexer
- multiplexer xilinx FPGA
Xilinx_ISE_9.2i_Software_Manuals
- Xilinx公司的FPGA的专用编程软件ISE的软件详细使用手册-Xilinx' s FPGA-programming software-specific details of the use of ISE software manuals
clock_generator_0_wrapper
- 赛灵思FPGA开发板上时钟源的VHDL源代码,可作为硬件设计参考资料!-Xilinx FPGA development board clock source of the VHDL source code, hardware design can be used as reference!
debug_module_wrapper
- 赛灵思FPGA开发板上调试模块的VHDL源代码,可作为硬件设计参考资料!-Xilinx FPGA development board debug module' s VHDL source code, hardware design can be used as reference!
bram_block_0_wrapper
- 赛灵思FPGA开发板上BRAM模块VHDL源代码,可作为硬件设计参考资料!-Xilinx FPGA development board BRAM module VHDL source code, hardware design can be used as reference!
xapp058
- xilinx Spartan-3E FPGA的MCU配置源代码-xilinx Spartan-3E FPGA to configure the source code of the MCU
Vme_Interface
- 这是本人设计的一个关于VME总线接口的FGPA程序,FPGA一边连接ARM LPC2294,一边连接VME总线,FPGA采用的XILINX公司的SPARTANII系列,程序包包含完整的工程文件-This is my design of a VME bus interface on the FGPA procedures, FPGA side of the connection ARM LPC2294, while connecting VME bus, FPGA using the XILINX
TechXclusives-GetSmartAboutReset
- Xilinx FPGA reset usage